[llvm] [X86] - Prevent the wrong fold of x86_avx512_mask_cmp_ss/sd to fcmp (PR #202321)
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llvm-commits at lists.llvm.org
Mon Jun 8 09:27:26 PDT 2026
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@@ -2424,6 +2424,17 @@ X86TTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
case Intrinsic::x86_avx512_mask_cmp_sd: {
// These intrinsics only demand the 0th element of their input vectors. If
// we can simplify the input based on that, do so now.
+ //
+ // NOTE: Only operands 0 and 1 (the scalar-as-vector FP inputs) may be
+ // touched here. For the mask.cmp.ss/sd intrinsics, operand 2 is the
+ // comparison predicate (0..31) and operand 4 is the SAE/embedded-rounding
+ // control; both encode semantics that a plain fcmp cannot represent
+ // (signaling-vs-quiet predicates and FP-exception suppression). Do NOT add
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ganeshgit wrote:
There is a [LLVM discourse item ](https://discourse.llvm.org/t/rfc-change-of-strict-fp-operation-representation-in-ir/85021/11).
As a test it isn't useful for future implementations?
https://github.com/llvm/llvm-project/pull/202321
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