[llvm] [SystemZ] Fold i16/i32/i64 logical RMW operations into memory operands in TableGen (PR #192802)

[Ulrich Weigand via llvm-commits]

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@@ -41,16 +41,56 @@ multiclass ZXB<SDPatternOperator operator, RegisterOperand cls,
 // of the second operand.
 class RMWI<SDPatternOperator load, SDPatternOperator operator,
            SDPatternOperator store, AddressingMode mode,
-           PatFrag imm, Instruction insn>
+           ImmLeaf imm, Instruction insn>
   : Pat<(store (operator (load mode:$addr), imm:$src), mode:$addr),
         (insn mode:$addr, (UIMM8 imm:$src))>;
 
+// Helpers for the ComplexPattern offset variants.
+// 16-bit truncation operations variant (offset 1).
+class RMWIOffset16<SDPatternOperator load, SDPatternOperator operator,
+                   ComplexPattern mode, PatFrag imm, Instruction insn>
+  : Pat<(truncstorei16 (i32 (operator (i32 (load mode:$addr)), imm:$src)),
+                       mode:$addr),
+        (insn mode:$addr, (UIMM8 $src))>;
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uweigand wrote:

Why do you need any of these?   Isn't this just `RMWI` with the appropriate parameters?

https://github.com/llvm/llvm-project/pull/192802