[llvm] [AMDGPU] Support i16 element types for tbuffer D16 load/store (PR #201420)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 8 06:23:46 PDT 2026
================
@@ -2342,30 +2342,45 @@ multiclass MTBUF_LoadIntrinsicPat<SDPatternOperator name, ValueType vt,
}
let OtherPredicates = [HasMTBUFInsts] in {
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, i32, "TBUFFER_LOAD_FORMAT_X">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v2i32, "TBUFFER_LOAD_FORMAT_XY">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v3i32, "TBUFFER_LOAD_FORMAT_XYZ">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v4i32, "TBUFFER_LOAD_FORMAT_XYZW">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, f32, "TBUFFER_LOAD_FORMAT_X">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v2f32, "TBUFFER_LOAD_FORMAT_XY">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v3f32, "TBUFFER_LOAD_FORMAT_XYZ">;
-defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, v4f32, "TBUFFER_LOAD_FORMAT_XYZW">;
+foreach vt = Reg32Types.types in {
+ defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, vt, "TBUFFER_LOAD_FORMAT_X">;
+}
+foreach vt = Reg64Types.types in {
+ defm : MTBUF_LoadIntrinsicPat<SItbuffer_load, vt, "TBUFFER_LOAD_FORMAT_XY">;
----------------
jayfoad wrote:
I'm asking the question: does it need to be limited to vectors, or would it work with any 64-bit type? I don't know the answer.
https://github.com/llvm/llvm-project/pull/201420
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