[llvm] [AMDGPU] Document that only naturally aligned atomics of up to 64 bits are supported by the AMDGPU backend (PR #200167)

[Fabian Ritter via llvm-commits]

https://github.com/ritter-x2a updated https://github.com/llvm/llvm-project/pull/200167

>From 30f5bff88ec3698fee08603c0345572e195bded2 Mon Sep 17 00:00:00 2001
From: Fabian Ritter <fabian.ritter at amd.com>
Date: Thu, 28 May 2026 08:12:38 -0400
Subject: [PATCH 1/2] [AMDGPU] Document that only naturally aligned atomics of
 up to 64 bits are supported by the AMDGPU backend

We get an error from AtomicExpandPass if those constraints are not satisfied.
The 64-bit limit is set [here, in AMDGPUISelLowering.cpp](https://github.com/llvm/llvm-project/blob/5cac2751fb9cf3112d16717b278e40d07dd6cfdc/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp#L645).
---
 llvm/docs/AMDGPUUsage.rst | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 121b66a657f5d..45186b7822807 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -7164,6 +7164,9 @@ The AMDGPU backend supports the following memory models:
     OpenCL memory. The target triple environment is used to determine if the
     source language is OpenCL (see :ref:`amdgpu-opencl`).
 
+The AMDGPU backend does not support atomic accesses with less than natural
+alignment or an access size of more than 64 bits.
+
 ``ds/flat_load/store/atomic`` instructions to local memory are termed LDS
 operations.
 

>From 0be85f0b3ccef097009123c7bfb90c1f8fa3e501 Mon Sep 17 00:00:00 2001
From: Fabian Ritter <fabian.ritter at amd.com>
Date: Fri, 29 May 2026 10:26:51 -0400
Subject: [PATCH 2/2] Introduce a new "Unsupported IR Constructs" section and
 move the point about unsupported atomics there.

---
 llvm/docs/AMDGPUUsage.rst | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 45186b7822807..ab504d3fbc452 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -2135,6 +2135,18 @@ Example:
 
   !0 = !{ !"agent" }
 
+.. _amdgpu_unsupported_constructs:
+
+Unsupported IR Constructs
+-------------------------
+
+The following LLVM IR constructs are not supported by the AMDGPU backend:
+
+* atomic accesses with less than natural alignment or an access size of
+  more than 64 bits
+
+This list is not exhaustive.
+
 .. _amdgpu_metadata:
 
 LLVM IR Metadata
@@ -7164,9 +7176,6 @@ The AMDGPU backend supports the following memory models:
     OpenCL memory. The target triple environment is used to determine if the
     source language is OpenCL (see :ref:`amdgpu-opencl`).
 
-The AMDGPU backend does not support atomic accesses with less than natural
-alignment or an access size of more than 64 bits.
-
 ``ds/flat_load/store/atomic`` instructions to local memory are termed LDS
 operations.