[llvm] [AArch64][SVE] Select immediate offsets for multi-vector instructions (PR #201637)

Paul Walker via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 8 04:46:12 PDT 2026


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@@ -4539,6 +4539,15 @@ defm STNT1D_4Z_IMM : sve2p1_mem_cst_si_4z<"stnt1d", 0b11, 0b1, ZZZZ_d_mul_r>;
 
 multiclass store_pn_x2<ValueType Ty, SDPatternOperator Store,
                         Instruction RegImmInst> {
+  let AddedComplexity = 1 in {
+    // scalar + immediate (mul vl)
+    def : Pat<(Store Ty:$vec0, Ty:$vec1, aarch64svcount:$PNg,
+                (am_sve_indexed_s4 GPR64sp:$base, simm4s1:$offset)),
+              (RegImmInst (REG_SEQUENCE ZPR2Mul2, Ty:$vec0, zsub0, Ty:$vec1, zsub1),
+                          PNR:$PNg, GPR64:$base, simm4s1:$offset)>;
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paulwalker-arm wrote:

The imm operand should be `simm4s2` to match the underlying instruction.

https://github.com/llvm/llvm-project/pull/201637


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