[llvm] d450981 - AMDGPU/UniformityAnalysis: Test MIR uniformity analysis for INLINEASM (#201956)

[via llvm-commits]

Author: Petar Avramovic
Date: 2026-06-08T13:22:36+02:00
New Revision: d4509810cef2b83848eedca2ba8561db4afafedb

URL: https://github.com/llvm/llvm-project/commit/d4509810cef2b83848eedca2ba8561db4afafedb
DIFF: https://github.com/llvm/llvm-project/commit/d4509810cef2b83848eedca2ba8561db4afafedb.diff

LOG: AMDGPU/UniformityAnalysis: Test MIR uniformity analysis for INLINEASM (#201956)

Resolves to always uniform at the moment.

Added: 
    llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/inline-asm.mir

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/inline-asm.mir b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/inline-asm.mir
new file mode 100644
index 0000000000000..8fc1a4981fa24
--- /dev/null
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/inline-asm.mir
@@ -0,0 +1,60 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -passes='print<machine-uniformity>' -filetype=null %s 2>&1 | FileCheck %s
+
+# CHECK-LABEL: MachineUniformityInfo for function:  @inlineasm_s
+# CHECK-LABEL: BLOCK bb.0
+# CHECK-NOT: DIVERGENT: %0: INLINEASM
+---
+name:            inlineasm_s
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    INLINEASM &"s_mov_b32 $0, 7", attdialect, regdef:SReg_32, def %0:sreg_32
+    $sgpr0 = COPY %0
+    SI_RETURN implicit $sgpr0
+...
+
+# CHECK-LABEL: MachineUniformityInfo for function:  @inlineasm_v
+# CHECK-LABEL: BLOCK bb.0
+# CHECK-NOT: DIVERGENT: %0: INLINEASM
+---
+name:            inlineasm_v
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    INLINEASM &"v_mov_b32 $0, 8", attdialect, regdef:VGPR_32, def %0:vgpr_32
+    $vgpr0 = COPY %0
+    SI_RETURN implicit $vgpr0
+...
+
+# CHECK-LABEL: MachineUniformityInfo for function:  @inlineasm_sv
+# CHECK-LABEL: BLOCK bb.0
+# CHECK-NOT: DIVERGENT: %0: INLINEASM
+# CHECK-NOT: DIVERGENT: %1: INLINEASM
+---
+name:            inlineasm_sv
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    INLINEASM &"s_mov_b32 $0, 7\0Av_mov_b32 $1, 8", attdialect, regdef:SReg_32, def %0:sreg_32, regdef:VGPR_32, def %1:vgpr_32
+    $sgpr0 = COPY %0
+    $vgpr0 = COPY %1
+    SI_RETURN implicit $sgpr0, implicit $vgpr0
+...
+
+# CHECK-LABEL: MachineUniformityInfo for function:  @inlineasm_svs
+# CHECK-LABEL: BLOCK bb.0
+# CHECK-NOT: DIVERGENT: %0: INLINEASM
+# CHECK-NOT: DIVERGENT: %1: INLINEASM
+# CHECK-NOT: DIVERGENT: %2: INLINEASM
+---
+name:            inlineasm_svs
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    INLINEASM &"s_mov_b32 $0, 1\0Av_mov_b32 $1, 2\0As_mov_b32 $2, 3", attdialect, regdef:SReg_32, def %0:sreg_32, regdef:VGPR_32, def %1:vgpr_32, regdef:SReg_32, def %2:sreg_32
+    $sgpr0 = COPY %0
+    $vgpr0 = COPY %1
+    $sgpr1 = COPY %2
+    SI_RETURN implicit $sgpr0, implicit $vgpr0, implicit $sgpr1
+...