[llvm] [AMDGPU] Add waterfall intrinsics (PR #192409)

Petar Avramovic via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 8 04:15:07 PDT 2026


================
@@ -2720,6 +2720,45 @@ def int_amdgcn_cs_chain:
             ],
             [IntrConvergent, IntrNoReturn, ImmArg<ArgIndex<4>>]>;
 
+// Waterfall intrinsics are used to mark a region as requiring waterfall loops to
+// activate and deactivate lanes in a loop (and sometimes transform VGPR values
+// into SGPR values).
+// Best case (all lanes have the same values) the loop will execute once,
+// worst case (all lanes have different values) the loop will execute wave-size times.
+//
+// The waterfall.begin intrinsic returns a new token that must be threaded through the
+// corresponding waterfall.readfirstlane and waterfall.end intrinsics, forming a
+// waterfall group of intrinsics that together define a waterfall region.
+// All intrinsics in a waterfall group must reside within the same basic block.
+// TODO: extend the support to allow spanning multiple blocks
+//
+// Where the intrinsic specifies "llvm_any_ty", the intrinsic will accept any of
+// the following types:
+// i16, v2i16, v4i16, i32, v2i32, v4i32, v8i32, f16, v2f16, v4f16, f32, v2f32,
+// v4f32, v8f32
----------------
petar-avramovic wrote:

Is there something specific about these types?  Think this accepts pointers also. I would assume any type that fits in some register class would work, or is there some optimization and only specific sizes are supported (32/64/128/256)

Also can we get a test for i16, I would like to see how it works with regards to true-16 on/off

https://github.com/llvm/llvm-project/pull/192409


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