[llvm] AMDGPU/UniformityAnalysis: MIR Uniformity analysis for INLINEASM (PR #201874)

[Pankaj Dwivedi via llvm-commits]

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@@ -11014,6 +11014,19 @@ ValueUniformity SIInstrInfo::getValueUniformity(const MachineInstr &MI) const {
       opcode == AMDGPU::SI_RESTORE_S32_FROM_VGPR)
     return ValueUniformity::AlwaysUniform;
 
+  // If any of defs is divergent, report as NeverUniform. isUniformReg will
+  // calculate in more detail for each def from its reg class, if available.
+  if (MI.isInlineAsm()) {
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PankajDwivedi-25 wrote:

As mentioned in the other PR: https://github.com/llvm/llvm-project/pull/201956 this looks fine to me for solving the existing bug.

https://github.com/llvm/llvm-project/pull/201874