[llvm] [AMDGPU] Enable WMMA256bInsts + Wave32 for gfx1200/gfx1201 + SISchedule fix + TargetParser gfx1200 propagation (PR #202093)

[Alexandra Munkes via llvm-commits]

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@@ -1570,7 +1572,8 @@ def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
    FeatureIEEEMinimumMaximumInsts, FeatureSALUMinimumMaximumInsts,
    FeatureMinimum3Maximum3F32, FeatureMinimum3Maximum3F16,
    FeatureAgentScopeFineGrainedRemoteMemoryAtomics, FeatureFlatOffsetBits24,
-   FeatureFlatSignedOffset, FeatureInstCacheLineSize128
+   FeatureFlatSignedOffset, FeatureInstCacheLineSize128,
+   FeatureWMMA256bInsts
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Malexandra-de wrote:

The instructions specified by FeatureWMMA256bInsts use the same opcode )VOPO3P, opcode 64) as the instructions specified by FeatureWMMA128bInsts, so the hardware can only support one of them.

https://github.com/llvm/llvm-project/pull/202093