[llvm] [SPIR-V] Lower `select` instructions with aggregate operands (PR #201417)

[Juan Manuel Martinez Caamaño via llvm-commits]

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@@ -3463,6 +3446,19 @@ bool SPIRVEmitIntrinsics::runOnFunction(Function &Func) {
         Phi.mutateType(B.getInt32Ty());
       }
 
+  // A SelectInst, like a PHINode, takes its result type from its operands.
+  // Aggregate arms are lowered to i32 value-ids (composite constants here,
+  // loads and other producers during the visitor pass below), so mutate an
+  // aggregate select to match, just as the PHI loop above does. Its original
+  // type is tracked in AggrConstTypes (used to assign the SPIR-V type) and its
+  // extractvalue users are lowered to spv_extractv.
+  for (Instruction &I : instructions(Func))
+    if (auto *Sel = dyn_cast<SelectInst>(&I))
+      if (Sel->getType()->isAggregateType()) {
+        AggrConstTypes[Sel] = Sel->getType();
+        Sel->mutateType(B.getInt32Ty());
+      }
----------------
jmmartinez wrote:

Since the handling of both is pretty much the same, maybe we can merge both loops.

Something like:

```cpp
  Type* I32Ty = B.getInt32Ty();
  for (Instruction &I : instructions(Func)) {
    bool IsPhiOrSelect = isa<PHINode>(I) || isa<SelectInst>(I);
    Type *T = I.getType();
    if(!T->isAggregateType())
      continue;
    AggrConstTypes[&I] = T;
    I.mutateType(I32Ty);
  }
```

https://github.com/llvm/llvm-project/pull/201417