[llvm] [AArch64][SVE] Select immediate offsets for multi-vector instructions (PR #201637)

[Sander de Smalen via llvm-commits]

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@@ -0,0 +1,158 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 -enable-subreg-liveness=true < %s | FileCheck %s
+
+;; Normal multi-vector loads/stores:
+
+define void @store_2x_vectors_offset_mul_vl(<vscale x 16 x i8> %zn0, <vscale x 16 x i8> %zn1, target("aarch64.svcount") %pn, ptr %addr) nounwind {
+; CHECK-LABEL: store_2x_vectors_offset_mul_vl:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    addvl sp, sp, #-1
+; CHECK-NEXT:    str p8, [sp, #7, mul vl] // 2-byte Spill
+; CHECK-NEXT:    mov p8.b, p0.b
+; CHECK-NEXT:    st1b { z0.b, z1.b }, pn8, [x0, #14, mul vl]
+; CHECK-NEXT:    ldr p8, [sp, #7, mul vl] // 2-byte Reload
+; CHECK-NEXT:    addvl sp, sp, #1
+; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    ret
+  %vscale = call i64 @llvm.vscale.i64()
+  %mul_vl_14 = mul i64 %vscale, 224  ; #14, mul vl
+  %offset.addr = getelementptr i8, ptr %addr, i64 %mul_vl_14
+  call void @llvm.aarch64.sve.st1.pn.x2.nxv16i8(<vscale x 16 x i8> %zn0, <vscale x 16 x i8> %zn1, target("aarch64.svcount") %pn, ptr %offset.addr)
+  ret void
+}
+
+define void @store_4x_vectors_offset_mul_vl(<vscale x 16 x i8> %zn0, <vscale x 16 x i8> %zn1, <vscale x 16 x i8> %zn2, <vscale x 16 x i8> %zn3, target("aarch64.svcount") %pn, ptr %addr) nounwind {
+; CHECK-LABEL: store_4x_vectors_offset_mul_vl:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    addvl sp, sp, #-1
+; CHECK-NEXT:    str p8, [sp, #7, mul vl] // 2-byte Spill
+; CHECK-NEXT:    mov p8.b, p0.b
+; CHECK-NEXT:    st1b { z0.b - z3.b }, pn8, [x0, #4, mul vl]
+; CHECK-NEXT:    ldr p8, [sp, #7, mul vl] // 2-byte Reload
+; CHECK-NEXT:    addvl sp, sp, #1
+; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    ret
+  %vscale = call i64 @llvm.vscale.i64()
+  %mul_vl_4 = mul i64 %vscale, 64  ; #4, mul vl
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sdesmalen-arm wrote:

maybe test 28 instead of 4? (similar question for some of the other tests)

https://github.com/llvm/llvm-project/pull/201637