[llvm] [AMDGPU] In `LowerDYNAMIC_STACKALLOC`, hoist the `readfirstlane` up one instruction (PR #201528)

[Matt Arsenault via llvm-commits]

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@@ -4717,18 +4717,17 @@ SDValue SITargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
         DAG.getTargetConstant(Intrinsic::amdgcn_wave_reduce_umax, dl, MVT::i32);
     Size = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, WaveReduction,
                        Size, DAG.getTargetConstant(0, dl, MVT::i32));
+    SDValue ReadFirstLaneID =
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arsenm wrote:

I'm not sure why SelectionDAG needs this readfirstlane then. The wave reduce should produce an SGPR?

https://github.com/llvm/llvm-project/pull/201528