[llvm] 1fe66fc - [GlobalISel] Add bitcast chain combine (#200694)

[via llvm-commits]

Author: Alex MacLean
Date: 2026-06-04T07:45:28-07:00
New Revision: 1fe66fcfff699bd4aeb6efa0a64ed32fc603af76

URL: https://github.com/llvm/llvm-project/commit/1fe66fcfff699bd4aeb6efa0a64ed32fc603af76
DIFF: https://github.com/llvm/llvm-project/commit/1fe66fcfff699bd4aeb6efa0a64ed32fc603af76.diff

LOG: [GlobalISel] Add bitcast chain combine (#200694)

Added: 
    

Modified: 
    llvm/include/llvm/Target/GlobalISel/Combine.td
    llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index 5c3dca9cd6e23..8bb87f3fd1705 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -1634,6 +1634,11 @@ def bitcast_bitcast_fold : GICombineRule<
       [{ return MRI.getType(${src0}.getReg()) == MRI.getType(${dst}.getReg()); }]),
   (apply [{ Helper.replaceSingleDefInstWithReg(*${op}, ${src0}.getReg()); }])>;
 
+def bitcast_bitcast_to_bitcast : GICombineRule<
+  (defs root:$dst),
+  (match (G_BITCAST $dst, $src1), (G_BITCAST $src1, $src0),
+      [{ return MRI.getType(${src0}.getReg()) != MRI.getType(${dst}.getReg()); }]),
+  (apply (G_BITCAST $dst, $src0))>;
 
 def fptrunc_fpext_fold : GICombineRule<
   (defs root:$dst),
@@ -2418,7 +2423,9 @@ def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
                                         add_sub_reg, buildvector_identity_fold,
                                         trunc_buildvector_fold,
                                         trunc_lshr_buildvector_fold,
-                                        bitcast_bitcast_fold, fptrunc_fpext_fold,
+                                        bitcast_bitcast_fold,
+                                        bitcast_bitcast_to_bitcast,
+                                        fptrunc_fpext_fold,
                                         right_identity_neg_zero_fp, right_identity_neg_zero_fp_nsz,
                                         right_identity_neg_one_fp]>;
 

diff  --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
index 6371001c40764..46009afa38f31 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
@@ -36,17 +36,16 @@ body: |
 ...
 
 ---
-name: s64_bitcast_
diff erentypes_nofold
+name: s64_bitcast_
diff erentypes_to_single_bitcast
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $vgpr0_vgpr1
-    ; CHECK-LABEL: name: s64_bitcast_
diff erentypes_nofold
+    ; CHECK-LABEL: name: s64_bitcast_
diff erentypes_to_single_bitcast
     ; CHECK: liveins: $vgpr0_vgpr1
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: %src:_(<2 x s32>) = COPY $vgpr0_vgpr1
-    ; CHECK-NEXT: %b1:_(s64) = G_BITCAST %src(<2 x s32>)
-    ; CHECK-NEXT: %b2:_(<4 x s16>) = G_BITCAST %b1(s64)
+    ; CHECK-NEXT: %b2:_(<4 x s16>) = G_BITCAST %src(<2 x s32>)
     ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %b2(<4 x s16>)
     %src:_(<2 x s32>) = COPY $vgpr0_vgpr1
     %b1:_(s64) = G_BITCAST %src