[llvm] [AMDGPU] Fix bit-packing condition in LiveRegOptimizer (PR #201520)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-late-codegenprepare %s | FileCheck %s
+
+; Make sure we don't crash on vectors with non-power-of-2 element types.
+; The LiveRegOptimizer's convertToOptType cannot bitcast-pack these into
+; i32 registers because the element size doesn't evenly divide the target size.
+
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arsenm wrote:

Mention issue number or add to the function / file name?

https://github.com/llvm/llvm-project/pull/201520