[llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)

Anshul Nigham via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 3 22:23:31 PDT 2026


================
@@ -910,17 +829,151 @@ bool AArch64PostLegalizerCombiner::optimizeConsecutiveMemOpAddressing(
   return Changed;
 }
 
-char AArch64PostLegalizerCombiner::ID = 0;
-INITIALIZE_PASS_BEGIN(AArch64PostLegalizerCombiner, DEBUG_TYPE,
+bool runCombiner(MachineFunction &MF, GISelCSEInfo *CSEInfo,
+                 GISelValueTracking *VT, MachineDominatorTree *MDT,
+                 const AArch64PostLegalizerCombinerImplRuleConfig &RuleConfig,
+                 bool EnableOpt, bool IsOptNone) {
+  if (MF.getProperties().hasFailedISel())
+    return false;
+  const Function &F = MF.getFunction();
+
+  const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
+  const LegalizerInfo *LI = ST.getLegalizerInfo();
+
+  CombinerInfo CInfo(/*AllowIllegalOps=*/false, /*ShouldLegalizeIllegal=*/false,
+                     /*LegalizerInfo=*/LI, EnableOpt, F.hasOptSize(),
+                     F.hasMinSize());
+  // Disable fixed-point iteration to reduce compile-time
+  CInfo.MaxIterations = 1;
+  CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
+  // Legalizer performs DCE, so a full DCE pass is unnecessary.
+  CInfo.EnableFullDCE = false;
+  AArch64PostLegalizerCombinerImpl Impl(MF, CInfo, *VT, CSEInfo, RuleConfig, ST,
+                                        MDT, LI);
+  bool Changed = Impl.combineMachineInstrs();
+
+  auto MIB = CSEMIRBuilder(MF);
----------------
nigham wrote:

Done.

https://github.com/llvm/llvm-project/pull/194156


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