[llvm] [VectorCombine] foldShuffleChainsToReduce - add FADD/FMUL handling (PR #201302)
Rajveer Singh Bharadwaj via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 08:00:43 PDT 2026
================
@@ -4172,6 +4192,13 @@ bool VectorCombine::foldShuffleChainsToReduce(Instruction &I) {
Intrinsic::ID ReducedOp =
(CommonCallOp ? getMinMaxReductionIntrinsicID(*CommonCallOp)
: getReductionForBinop(*CommonBinOp));
+ // getReductionForBinop only covers integer ops; handle FP here.
+ if (ReducedOp == Intrinsic::not_intrinsic && CommonBinOp) {
+ if (*CommonBinOp == Instruction::FAdd)
+ ReducedOp = Intrinsic::vector_reduce_fadd;
+ else if (*CommonBinOp == Instruction::FMul)
+ ReducedOp = Intrinsic::vector_reduce_fmul;
+ }
----------------
Rajveer100 wrote:
I think we could add this in `getReductionForBinop` itself right? It would go well with `getArithmeticReductionInstruction` too since they are inverse of each other.
https://github.com/llvm/llvm-project/pull/201302
More information about the llvm-commits
mailing list