[clang] [llvm] [Clang] Emit struct TBAA for llvm.errno.tbaa (PR #201375)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 07:52:44 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Nikita Popov (nikic)
<details>
<summary>Changes</summary>
For `!llvm.errno.tbaa`, emit TBAA for accessing the member of a virtual `__libc_errno` struct. The purpose is to indicate that errno aliases with `int` accesses, but not `int` member accesses in other structs.
This is an alternative to https://github.com/llvm/llvm-project/pull/200367.
---
Patch is 795.52 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/201375.diff
40 Files Affected:
- (modified) clang/lib/CodeGen/CodeGenModule.cpp (+16-3)
- (modified) clang/lib/CodeGen/CodeGenTBAA.h (+4-4)
- (modified) clang/test/C/C11/n1285_1.c (+36-36)
- (modified) clang/test/CodeGen/AArch64/ls64-inline-asm.c (+12-12)
- (modified) clang/test/CodeGen/PowerPC/builtins-ppc-amo.c (+32-32)
- (modified) clang/test/CodeGen/allow-ubsan-check.c (+28-28)
- (modified) clang/test/CodeGen/attr-counted-by.c (+374-374)
- (modified) clang/test/CodeGen/errno-tbaa.c (+9-1)
- (modified) clang/test/CodeGen/sanitize-metadata-ignorelist.c (+6-6)
- (modified) clang/test/CodeGen/sanitize-metadata-nosanitize.c (+31-29)
- (modified) clang/test/CodeGen/sanitize-type-globals.cpp (+2-1)
- (modified) clang/test/CodeGen/tbaa-class.cpp (+54-54)
- (modified) clang/test/CodeGen/tbaa-matrix.c (+44-44)
- (modified) clang/test/CodeGen/tbaa-ms-abi.cpp (+8-8)
- (modified) clang/test/CodeGen/tbaa-pointers.c (+276-160)
- (modified) clang/test/CodeGen/tbaa-struct-bitfield-endianness.cpp (+2-2)
- (modified) clang/test/CodeGen/tbaa-struct.cpp (+5-6)
- (modified) clang/test/CodeGen/tbaa.c (+220-53)
- (modified) clang/test/CodeGen/tbaa.cpp (+3-5)
- (modified) clang/test/CodeGen/union-tbaa1.c (+12-12)
- (modified) clang/test/CodeGen/wasm-fp16.c (+39-38)
- (modified) clang/test/CodeGenCXX/attr-likelihood-if-branch-weights.cpp (+4-4)
- (modified) clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp (+76-76)
- (modified) clang/test/CodeGenCXX/attr-likelihood-switch-branch-weights.cpp (+53-53)
- (modified) clang/test/CodeGenCXX/load-reference-metadata.cpp (+21-21)
- (modified) clang/test/CodeGenCXX/std-byte.cpp (+42-15)
- (modified) clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl (+20-18)
- (modified) clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (+132-130)
- (modified) clang/test/CodeGenOpenCL/amdgpu-printf.cl (+18-18)
- (modified) clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl (+116-116)
- (modified) clang/test/CodeGenOpenCL/implicit-addrspacecast-function-parameter.cl (+9-9)
- (modified) clang/test/CodeGenOpenCL/preserve_vec3.cl (+6-6)
- (modified) clang/test/Headers/__clang_hip_math.hip (+405-406)
- (modified) clang/test/Headers/amdhsa_abi.cl (+64-64)
- (modified) clang/test/OpenMP/bug54082.c (+24-24)
- (modified) clang/test/OpenMP/bug56913.c (+10-10)
- (modified) clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp (+263-263)
- (modified) clang/test/OpenMP/parallel_if_codegen_PR51349.cpp (+20-20)
- (modified) clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp (+101-101)
- (modified) llvm/test/Transforms/InstCombine/may-alias-errno.ll (+31-10)
``````````diff
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 50089f4a5016a..ff9940d444a23 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -1795,10 +1795,23 @@ void CodeGenModule::Release() {
// for an int access. This allows LLVM to reason about what memory can be
// accessed by certain library calls that only touch errno.
if (TBAA) {
- TBAAAccessInfo TBAAInfo = getTBAAAccessInfo(Context.IntTy);
- if (llvm::MDNode *IntegerNode = getTBAAAccessTagInfo(TBAAInfo)) {
+ if (llvm::MDNode *IntegerNode = getTBAATypeInfo(Context.IntTy)) {
+ // Pretend that errno is part of a __libc_errno struct, to indicate that
+ // it should alias with plain integer accesses, but not int member
+ // accesses in structs.
+ llvm::MDBuilder MDB(TheModule.getContext());
+ uint64_t Size = Context.getTypeSizeInChars(Context.IntTy).getQuantity();
+ llvm::MDNode *StructNode =
+ CodeGenOpts.NewStructPathTBAA
+ ? MDB.createTBAATypeNode(TBAA->getChar(), Size,
+ MDB.createString("__libc_errno"),
+ {{0, Size, IntegerNode}})
+ : MDB.createTBAAStructTypeNode("__libc_errno",
+ {{IntegerNode, 0}});
+ TBAAAccessInfo Info(StructNode, IntegerNode, 0, Size);
+ llvm::MDNode *StructTagNode = getTBAAAccessTagInfo(Info);
auto *ErrnoTBAAMD = TheModule.getOrInsertNamedMetadata(ErrnoTBAAMDName);
- ErrnoTBAAMD->addOperand(IntegerNode);
+ ErrnoTBAAMD->addOperand(StructTagNode);
}
}
}
diff --git a/clang/lib/CodeGen/CodeGenTBAA.h b/clang/lib/CodeGen/CodeGenTBAA.h
index f3345274c8f55..5e1221a129103 100644
--- a/clang/lib/CodeGen/CodeGenTBAA.h
+++ b/clang/lib/CodeGen/CodeGenTBAA.h
@@ -145,10 +145,6 @@ class CodeGenTBAA {
/// for this translation unit.
llvm::MDNode *getRoot();
- /// getChar - This is the mdnode for "char", which is special, and any types
- /// considered to be equivalent to it.
- llvm::MDNode *getChar();
-
/// getAnyPtr - This is the mdnode for any pointer type of (at least) the
/// given pointer depth.
llvm::MDNode *getAnyPtr(unsigned PtrDepth = 1);
@@ -206,6 +202,10 @@ class CodeGenTBAA {
/// getAccessTagInfo - Get TBAA tag for a given memory access.
llvm::MDNode *getAccessTagInfo(TBAAAccessInfo Info);
+ /// getChar - This is the mdnode for "char", which is special, and any types
+ /// considered to be equivalent to it.
+ llvm::MDNode *getChar();
+
/// mergeTBAAInfoForCast - Get merged TBAA information for the purpose of
/// type casts.
TBAAAccessInfo mergeTBAAInfoForCast(TBAAAccessInfo SourceInfo,
diff --git a/clang/test/C/C11/n1285_1.c b/clang/test/C/C11/n1285_1.c
index a1422f2b6ff63..ddf00c99fda92 100644
--- a/clang/test/C/C11/n1285_1.c
+++ b/clang/test/C/C11/n1285_1.c
@@ -26,16 +26,16 @@ struct X f(void);
// C11-O2-NEXT: [[ENTRY:.*:]]
// C11-O2-NEXT: [[P:%.*]] = alloca ptr, align 8
// C11-O2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_X:%.*]], align 4
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]]) #[[ATTR5:[0-9]+]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[P]]) #[[ATTR4:[0-9]+]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: call void @f(ptr dead_on_unwind writable sret([[STRUCT_X]]) align 4 [[REF_TMP]])
// C11-O2-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[REF_TMP]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr [[A]], i64 0, i64 0
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: store ptr [[ARRAYDECAY]], ptr [[P]], align 8, !tbaa [[INTPTR_TBAA6:![0-9]+]]
// C11-O2-NEXT: [[TMP0:%.*]] = load ptr, ptr [[P]], align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA2:![0-9]+]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]]) #[[ATTR5]]
+// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA9:![0-9]+]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[P]]) #[[ATTR4]]
// C11-O2-NEXT: ret i32 [[TMP1]]
//
int func_return(void) {
@@ -79,7 +79,7 @@ int func_return(void) {
// C11-O2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_X:%.*]], align 4
// C11-O2-NEXT: [[Q:%.*]] = alloca ptr, align 8
// C11-O2-NEXT: [[DOTCOMPOUNDLITERAL:%.*]] = alloca [[STRUCT_X]], align 4
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: br i1 true, label %[[COND_TRUE:.*]], label %[[COND_FALSE:.*]]
// C11-O2: [[COND_TRUE]]:
// C11-O2-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[REF_TMP]], i8 0, i64 20, i1 false)
@@ -92,19 +92,19 @@ int func_return(void) {
// C11-O2-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[REF_TMP]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr [[A1]], i64 0, i64 0
// C11-O2-NEXT: store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[Q]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[Q]]) #[[ATTR4]]
// C11-O2-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[DOTCOMPOUNDLITERAL]], i8 0, i64 20, i1 false)
// C11-O2-NEXT: [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[DOTCOMPOUNDLITERAL]], i32 0, i32 0
// C11-O2-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[DOTCOMPOUNDLITERAL]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [5 x i32], ptr [[A3]], i64 0, i64 0
// C11-O2-NEXT: store ptr [[ARRAYDECAY4]], ptr [[Q]], align 8, !tbaa [[INTPTR_TBAA6]]
// C11-O2-NEXT: [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA2]]
+// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA9]]
// C11-O2-NEXT: [[TMP2:%.*]] = load ptr, ptr [[Q]], align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4, !tbaa [[INT_TBAA2]]
+// C11-O2-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4, !tbaa [[INT_TBAA9]]
// C11-O2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP3]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[Q]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[Q]]) #[[ATTR4]]
// C11-O2-NEXT: ret i32 [[ADD]]
//
int ternary(void) {
@@ -133,16 +133,16 @@ int ternary(void) {
// C11-O2-NEXT: [[ENTRY:.*:]]
// C11-O2-NEXT: [[X:%.*]] = alloca [[STRUCT_X:%.*]], align 4
// C11-O2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_X]], align 4
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9:![0-9]+]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT10:![0-9]+]]
// C11-O2-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[REF_TMP]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr [[A]], i64 0, i64 0
// C11-O2-NEXT: store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA2]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
+// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA9]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR4]]
// C11-O2-NEXT: ret i32 [[TMP1]]
//
int comma(void) {
@@ -170,16 +170,16 @@ int comma(void) {
// C11-O2-NEXT: [[ENTRY:.*:]]
// C11-O2-NEXT: [[X:%.*]] = alloca [[STRUCT_X:%.*]], align 4
// C11-O2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_X]], align 4
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT10]]
// C11-O2-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[REF_TMP]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr [[A]], i64 0, i64 0
// C11-O2-NEXT: store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA2]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
+// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA9]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR4]]
// C11-O2-NEXT: ret i32 [[TMP1]]
//
int cast(void) {
@@ -210,19 +210,19 @@ int cast(void) {
// C11-O2-NEXT: [[X:%.*]] = alloca [[STRUCT_X:%.*]], align 4
// C11-O2-NEXT: [[S:%.*]] = alloca [[STRUCT_X]], align 4
// C11-O2-NEXT: [[REF_TMP:%.*]] = alloca [[STRUCT_X]], align 4
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[S]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[X]], ptr align 4 [[S]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9]]
-// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT9]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[X]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[S]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.start.p0(ptr [[REF_TMP]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[X]], ptr align 4 [[S]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT10]]
+// C11-O2-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[REF_TMP]], ptr align 4 [[X]], i64 20, i1 false), !tbaa.struct [[TBAA_STRUCT10]]
// C11-O2-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_X]], ptr [[REF_TMP]], i32 0, i32 0
// C11-O2-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [5 x i32], ptr [[A]], i64 0, i64 0
// C11-O2-NEXT: store ptr [[ARRAYDECAY]], ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR5]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[REF_TMP]]) #[[ATTR4]]
// C11-O2-NEXT: [[TMP0:%.*]] = load ptr, ptr @p, align 8, !tbaa [[INTPTR_TBAA6]]
-// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA2]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[S]]) #[[ATTR5]]
-// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR5]]
+// C11-O2-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !tbaa [[INT_TBAA9]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[S]]) #[[ATTR4]]
+// C11-O2-NEXT: call void @llvm.lifetime.end.p0(ptr [[X]]) #[[ATTR4]]
// C11-O2-NEXT: ret i32 [[TMP1]]
//
int assign(void) {
@@ -232,13 +232,13 @@ int assign(void) {
return *p;
}
//.
-// C11-O2: [[INT_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
-// C11-O2: [[META3]] = !{!"int", [[META4:![0-9]+]], i64 0}
+// C11-O2: [[META3:![0-9]+]] = !{!"int", [[META4:![0-9]+]], i64 0}
// C11-O2: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
// C11-O2: [[META5]] = !{!"Simple C/C++ TBAA"}
// C11-O2: [[INTPTR_TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0}
// C11-O2: [[META7]] = !{!"p1 int", [[META8:![0-9]+]], i64 0}
// C11-O2: [[META8]] = !{!"any pointer", [[META4]], i64 0}
-// C11-O2: [[TBAA_STRUCT9]] = !{i64 0, i64 20, [[META10:![0-9]+]]}
-// C11-O2: [[META10]] = !{[[META4]], [[META4]], i64 0}
+// C11-O2: [[INT_TBAA9]] = !{[[META3]], [[META3]], i64 0}
+// C11-O2: [[TBAA_STRUCT10]] = !{i64 0, i64 20, [[META11:![0-9]+]]}
+// C11-O2: [[META11]] = !{[[META4]], [[META4]], i64 0}
//.
diff --git a/clang/test/CodeGen/AArch64/ls64-inline-asm.c b/clang/test/CodeGen/AArch64/ls64-inline-asm.c
index 04e2207357817..58444b528cdc5 100644
--- a/clang/test/CodeGen/AArch64/ls64-inline-asm.c
+++ b/clang/test/CodeGen/AArch64/ls64-inline-asm.c
@@ -30,28 +30,28 @@ void store(const struct foo *input, void *addr)
// CHECK-LABEL: define dso_local void @store2(
// CHECK-SAME: ptr noundef readonly captures(none) [[IN:%.*]], ptr noundef [[ADDR:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IN]], align 4, !tbaa [[INT_TBAA2:![0-9]+]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[IN]], align 4, !tbaa [[INT_TBAA8:![0-9]+]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP0]] to i64
// CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 4
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX1]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 16
-// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV5:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 64
-// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV8:%.*]] = sext i32 [[TMP3]] to i64
// CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 100
-// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX10]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX10]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV11:%.*]] = sext i32 [[TMP4]] to i64
// CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 144
-// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX13]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV14:%.*]] = sext i32 [[TMP5]] to i64
// CHECK-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 196
-// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX16]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV17:%.*]] = sext i32 [[TMP6]] to i64
// CHECK-NEXT: [[ARRAYIDX19:%.*]] = getelementptr inbounds nuw i8, ptr [[IN]], i64 256
-// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX19]], align 4, !tbaa [[INT_TBAA2]]
+// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX19]], align 4, !tbaa [[INT_TBAA8]]
// CHECK-NEXT: [[CONV20:%.*]] = sext i32 [[TMP7]] to i64
// CHECK-NEXT: [[S_SROA_10_0_INSERT_EXT:%.*]] = zext i64 [[CONV20]] to i512
// CHECK-NEXT: [[S_SROA_10_0_INSERT_SHIFT:%.*]] = shl nuw i512 [[S_SROA_10_0_INSERT_EXT]], 448
@@ -75,7 +75,7 @@ void store(const struct foo *input, void *addr)
// CHECK-NEXT: [[S_SROA_0_0_INSERT_EXT:%.*]] = zext i64 [[CONV]] to i512
// CHECK-NEXT: [[S_SROA_0_0_INSERT_MASK:%.*]] = or disjoint i512 [[S_SROA_4_0_INSERT_MASK]], [[S_SROA_4_0_INSERT_SHIFT]]
// CHECK-NEXT: [[S_SROA_0_0_INSERT_INSERT:%.*]] = or i512 [[S_SROA_0_0_INSERT_MASK]], [[S_SROA_0_0_INSERT_EXT]]
-// CHECK-NEXT: tail call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], ptr [[ADDR]]) #[[ATTR1]], !srcloc [[META8:![0-9]+]]
+// CHECK-NEXT: tail call void asm sideeffect "st64b $0,[$1]", "r,r,~{memory}"(i512 [[S_SROA_0_0_INSERT_INSERT]], ptr [[ADDR]]) #[[ATTR1]], !srcloc [[META9:![0-9]+]]
// CHECK-NEXT: ret void
//
void store2(int *in, void *addr)
@@ -84,11 +84,11 @@ void store2(int *in, void *addr)
__asm__ volatile ("st64b %0,[%1]" : : "r" (s), "r" (addr) : "memory" );
}
//.
-// CHECK: [[INT_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0}
-// CHECK: [[META3]] = !{!"int", [[META4:![0-9]+]], i64 0}
+// CHECK: [[META3:![0-9]+]] = !{!"int", [[META4:![0-9]+]], i64 0}
// CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0}
// CHECK: [[META5]] = !{!"Simple C/C++ TBAA"}
// CHECK: [[META6]] = !{i64 789}
// CHECK: [[META7]] = !{i64 1368}
-// CHECK: [[META8]] = !{i64 5992}
+// CHECK: [[INT_TBAA8]] = !{[[META3]], [[META3]], i64 0}
+// CHECK: [[META9]] = !{i64 5992}
//.
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-amo.c b/clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
index 32b25de059936..e0c05fb2f57c9 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
@@ -8,14 +8,14 @@
// CHECK-SAME: ptr noundef [[PTR:%.*]], i32 noundef zeroext [[VALUE:%.*]], ptr noundef writeonly captures(none) initializes((0, 4)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
// CHECK-NEXT: [[ENTRY:.*:]]
// CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.ppc.amo.lwat(ptr [[PTR]], i32 [[VALUE]], i32 0)
-// CHECK-NEXT: store i32 [[TMP0]], ptr [[RESP]], align 4, !tbaa [[INT_TBAA2:![0-9]+]]
+// CHECK-NEXT: store i32 [[TMP0]], ptr [[RESP]], align 4, !tbaa [[INT_TBAA6:![0-9]+]]
// CHECK-NEXT: ret void
//
// AIX-LABEL: define void @test_unsigned_lwat(
// AIX-SAME: ptr noundef [[PTR:%.*]], i32 noundef zeroext [[VALUE:%.*]], ptr noundef writeonly captures(none) initializes((0, 4)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
// AIX-NEXT: [[ENTRY:.*:]]
// AIX-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.ppc.amo.lwat(ptr [[PTR]], i32 [[VALUE]], i32 0)
-// AIX-NEXT: store i32 [[TMP0]], ptr [[RESP]], align 4, !tbaa [[INT_TBAA2:![0-9]+]]
+// AIX-NEXT: store i32 [[TMP0]], ptr [[RESP]], align 4, !tbaa [[INT_TBAA6:![0-9]+]]
// AIX-NEXT: ret void
//
void test_unsigned_lwat(unsigned int *ptr, unsigned int value, unsigned int * resp) {
@@ -27,14 +27,14 @@ void test_unsigned_lwat(unsigned int *ptr, unsigned int value, unsigned int * re
// CHECK-SAME: ptr noundef [[PTR:%.*]], i64 noundef [[VALUE:%.*]], ptr noundef writeonly captures(none) initializes((0, 8)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] {
// CHECK-NEXT: [[ENTRY:.*:]]
// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.amo.ldat(ptr [[PTR]], i64 [[VALUE]], i32 3)
-// CHECK-NEXT: store i64 [[TMP0]], ptr [[RESP]], align 8, !tbaa [[LONG_TBAA...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/201375
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