[llvm] [CodeGen][AMDGPU] Remove premature empty subrange elimination (PR #201263)

[Steffen Larsen via llvm-commits]

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@@ -0,0 +1,1524 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=greedy,2 < %s | FileCheck %s
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steffenlarsen wrote:

I've changed it to run the full llc command and removed the FileCheck expectations. I wasn't able to create a mir input though, sadly.

https://github.com/llvm/llvm-project/pull/201263