[llvm] [AMDGPU] Be more careful about using expandDivRem24 (PR #201186)

[Manuel Carrasco via llvm-commits]

mgcarrasco wrote:

@LU-JOHN The handling for this edge case could also be missing in LowerDIVREM24 for MIR. 

I worked on https://github.com/llvm/llvm-project/pull/196418 to ensure that LowerDIVREM24 is applied only on 24-bit integers for the unsigned case. The 24-bit range check was not working as intended. This may have to be refined further.

https://github.com/llvm/llvm-project/pull/201186