[llvm] [AMDGPU][NFC] Add atomic optimization tests for gfx13 (PR #201299)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 02:23:55 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Mariusz Sikora (mariusz-sikora-at-amd)
<details>
<summary>Changes</summary>
---
Patch is 457.09 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/201299.diff
6 Files Affected:
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll (+526)
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll (+2864)
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll (+3685)
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll (+207)
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll (+438)
- (modified) llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll (+498)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
index bbdec31772127..1768559f26f45 100644
--- a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
@@ -8,6 +8,8 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 -amdgpu-atomic-optimizer-strategy=Iterative < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11W32 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64 -amdgpu-atomic-optimizer-strategy=Iterative < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12W64 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32 -amdgpu-atomic-optimizer-strategy=Iterative < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12W32 %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize64 -amdgpu-atomic-optimizer-strategy=Iterative < %s | FileCheck -enable-var-scope -check-prefixes=GFX13,GFX13W64 %s
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1310 -mattr=+wavefrontsize32 -amdgpu-atomic-optimizer-strategy=Iterative < %s | FileCheck -enable-var-scope -check-prefixes=GFX13,GFX13W32 %s
declare i32 @llvm.amdgcn.workitem.id.x()
declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32, ptr addrspace(8), i32, i32, i32 immarg)
@@ -275,6 +277,65 @@ define amdgpu_kernel void @add_i32_constant(ptr addrspace(1) %out, ptr addrspace
; GFX12W32-NEXT: s_wait_kmcnt 0x0
; GFX12W32-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13W64-LABEL: add_i32_constant:
+; GFX13W64: ; %bb.0: ; %entry
+; GFX13W64-NEXT: s_mov_b64 s[2:3], exec
+; GFX13W64-NEXT: s_mov_b64 s[0:1], exec
+; GFX13W64-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0
+; GFX13W64-NEXT: ; implicit-def: $vgpr1
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13W64-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0
+; GFX13W64-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W64-NEXT: s_cbranch_execz .LBB0_2
+; GFX13W64-NEXT: ; %bb.1:
+; GFX13W64-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W64-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX13W64-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX13W64-NEXT: s_mul_i32 s2, s2, 5
+; GFX13W64-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W64-NEXT: .LBB0_2:
+; GFX13W64-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX13W64-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W64-NEXT: s_wait_loadcnt 0x0
+; GFX13W64-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W64-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13W64-NEXT: v_mad_u32_u24 v0, 5, v0, s2
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W64-NEXT: s_endpgm
+;
+; GFX13W32-LABEL: add_i32_constant:
+; GFX13W32: ; %bb.0: ; %entry
+; GFX13W32-NEXT: s_mov_b32 s1, exec_lo
+; GFX13W32-NEXT: s_mov_b32 s0, exec_lo
+; GFX13W32-NEXT: v_mbcnt_lo_u32_b32 v0, s1, 0
+; GFX13W32-NEXT: ; implicit-def: $vgpr1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W32-NEXT: s_cbranch_execz .LBB0_2
+; GFX13W32-NEXT: ; %bb.1:
+; GFX13W32-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W32-NEXT: s_bcnt1_i32_b32 s1, s1
+; GFX13W32-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: s_mul_i32 s1, s1, 5
+; GFX13W32-NEXT: v_mov_b32_e32 v1, s1
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W32-NEXT: .LBB0_2:
+; GFX13W32-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX13W32-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W32-NEXT: s_wait_loadcnt 0x0
+; GFX13W32-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W32-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13W32-NEXT: v_mad_u32_u24 v0, 5, v0, s2
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W32-NEXT: s_endpgm
entry:
%old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 5, ptr addrspace(8) %inout, i32 0, i32 0, i32 0)
store i32 %old, ptr addrspace(1) %out
@@ -553,6 +614,67 @@ define amdgpu_kernel void @add_i32_uniform(ptr addrspace(1) %out, ptr addrspace(
; GFX12W32-NEXT: v_mov_b32_e32 v1, 0
; GFX12W32-NEXT: global_store_b32 v1, v0, s[2:3]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13W64-LABEL: add_i32_uniform:
+; GFX13W64: ; %bb.0: ; %entry
+; GFX13W64-NEXT: s_load_b32 s6, s[4:5], 0x44 nv
+; GFX13W64-NEXT: s_mov_b64 s[2:3], exec
+; GFX13W64-NEXT: s_mov_b64 s[0:1], exec
+; GFX13W64-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0
+; GFX13W64-NEXT: ; implicit-def: $vgpr1
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13W64-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0
+; GFX13W64-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W64-NEXT: s_cbranch_execz .LBB1_2
+; GFX13W64-NEXT: ; %bb.1:
+; GFX13W64-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W64-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: s_mul_i32 s2, s6, s2
+; GFX13W64-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX13W64-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W64-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W64-NEXT: .LBB1_2:
+; GFX13W64-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX13W64-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W64-NEXT: s_wait_loadcnt 0x0
+; GFX13W64-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W64-NEXT: v_mad_co_u64_u32 v[0:1], null, s6, v0, s[2:3]
+; GFX13W64-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W64-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W64-NEXT: s_endpgm
+;
+; GFX13W32-LABEL: add_i32_uniform:
+; GFX13W32: ; %bb.0: ; %entry
+; GFX13W32-NEXT: s_load_b32 s0, s[4:5], 0x44 nv
+; GFX13W32-NEXT: s_mov_b32 s2, exec_lo
+; GFX13W32-NEXT: s_mov_b32 s1, exec_lo
+; GFX13W32-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0
+; GFX13W32-NEXT: ; implicit-def: $vgpr1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W32-NEXT: s_cbranch_execz .LBB1_2
+; GFX13W32-NEXT: ; %bb.1:
+; GFX13W32-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W32-NEXT: s_bcnt1_i32_b32 s2, s2
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: s_mul_i32 s2, s0, s2
+; GFX13W32-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX13W32-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W32-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W32-NEXT: .LBB1_2:
+; GFX13W32-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX13W32-NEXT: s_load_b64 s[2:3], s[4:5], 0x24 nv
+; GFX13W32-NEXT: s_wait_loadcnt 0x0
+; GFX13W32-NEXT: v_readfirstlane_b32 s4, v1
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_mad_co_u64_u32 v[0:1], null, s0, v0, s[4:5]
+; GFX13W32-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W32-NEXT: global_store_b32 v1, v0, s[2:3]
+; GFX13W32-NEXT: s_endpgm
entry:
%old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 %additive, ptr addrspace(8) %inout, i32 0, i32 0, i32 0)
store i32 %old, ptr addrspace(1) %out
@@ -930,6 +1052,89 @@ define amdgpu_kernel void @add_i32_varying_vdata(ptr addrspace(1) %out, ptr addr
; GFX12W32-NEXT: s_wait_kmcnt 0x0
; GFX12W32-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13W64-LABEL: add_i32_varying_vdata:
+; GFX13W64: ; %bb.0: ; %entry
+; GFX13W64-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13W64-NEXT: s_mov_b64 s[0:1], exec
+; GFX13W64-NEXT: s_mov_b32 s2, 0
+; GFX13W64-NEXT: ; implicit-def: $vgpr0
+; GFX13W64-NEXT: .LBB2_1: ; %ComputeLoop
+; GFX13W64-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX13W64-NEXT: s_ctz_i32_b64 s3, s[0:1]
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX13W64-NEXT: v_readlane_b32 s8, v1, s3
+; GFX13W64-NEXT: v_writelane_b32 v0, s2, s3
+; GFX13W64-NEXT: s_lshl_b64 s[6:7], 1, s3
+; GFX13W64-NEXT: s_add_co_i32 s2, s2, s8
+; GFX13W64-NEXT: s_and_not1_b64 s[0:1], s[0:1], s[6:7]
+; GFX13W64-NEXT: s_cbranch_scc1 .LBB2_1
+; GFX13W64-NEXT: ; %bb.2: ; %ComputeEnd
+; GFX13W64-NEXT: v_mbcnt_lo_u32_b32 v1, exec_lo, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13W64-NEXT: v_mbcnt_hi_u32_b32 v1, exec_hi, v1
+; GFX13W64-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
+; GFX13W64-NEXT: ; implicit-def: $vgpr1
+; GFX13W64-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX13W64-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX13W64-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX13W64-NEXT: s_cbranch_execz .LBB2_4
+; GFX13W64-NEXT: ; %bb.3:
+; GFX13W64-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W64-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W64-NEXT: .LBB2_4:
+; GFX13W64-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX13W64-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W64-NEXT: s_wait_loadcnt 0x0
+; GFX13W64-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W64-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13W64-NEXT: v_add_nc_u32_e32 v0, s2, v0
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W64-NEXT: s_endpgm
+;
+; GFX13W32-LABEL: add_i32_varying_vdata:
+; GFX13W32: ; %bb.0: ; %entry
+; GFX13W32-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13W32-NEXT: s_mov_b32 s1, exec_lo
+; GFX13W32-NEXT: s_mov_b32 s0, 0
+; GFX13W32-NEXT: ; implicit-def: $vgpr0
+; GFX13W32-NEXT: .LBB2_1: ; %ComputeLoop
+; GFX13W32-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX13W32-NEXT: s_ctz_i32_b32 s2, s1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: v_readlane_b32 s3, v1, s2
+; GFX13W32-NEXT: v_writelane_b32 v0, s0, s2
+; GFX13W32-NEXT: s_lshl_b32 s2, 1, s2
+; GFX13W32-NEXT: s_add_co_i32 s0, s0, s3
+; GFX13W32-NEXT: s_and_not1_b32 s1, s1, s2
+; GFX13W32-NEXT: s_cbranch_scc1 .LBB2_1
+; GFX13W32-NEXT: ; %bb.2: ; %ComputeEnd
+; GFX13W32-NEXT: v_mbcnt_lo_u32_b32 v1, exec_lo, 0
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
+; GFX13W32-NEXT: ; implicit-def: $vgpr1
+; GFX13W32-NEXT: s_and_saveexec_b32 s1, vcc_lo
+; GFX13W32-NEXT: s_xor_b32 s1, exec_lo, s1
+; GFX13W32-NEXT: s_cbranch_execz .LBB2_4
+; GFX13W32-NEXT: ; %bb.3:
+; GFX13W32-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W32-NEXT: v_mov_b32_e32 v1, s0
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: buffer_atomic_add_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W32-NEXT: .LBB2_4:
+; GFX13W32-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX13W32-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W32-NEXT: s_wait_loadcnt 0x0
+; GFX13W32-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, s2, v0
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W32-NEXT: s_endpgm
entry:
%lane = call i32 @llvm.amdgcn.workitem.id.x()
%old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 %lane, ptr addrspace(8) %inout, i32 0, i32 0, i32 0)
@@ -1330,6 +1535,94 @@ define amdgpu_kernel void @struct_add_i32_varying_vdata(ptr addrspace(1) %out, p
; GFX12W32-NEXT: s_wait_kmcnt 0x0
; GFX12W32-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13W64-LABEL: struct_add_i32_varying_vdata:
+; GFX13W64: ; %bb.0: ; %entry
+; GFX13W64-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13W64-NEXT: s_mov_b64 s[0:1], exec
+; GFX13W64-NEXT: s_mov_b32 s2, 0
+; GFX13W64-NEXT: ; implicit-def: $vgpr0
+; GFX13W64-NEXT: .LBB3_1: ; %ComputeLoop
+; GFX13W64-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX13W64-NEXT: s_ctz_i32_b64 s3, s[0:1]
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX13W64-NEXT: v_readlane_b32 s8, v1, s3
+; GFX13W64-NEXT: v_writelane_b32 v0, s2, s3
+; GFX13W64-NEXT: s_lshl_b64 s[6:7], 1, s3
+; GFX13W64-NEXT: s_add_co_i32 s2, s2, s8
+; GFX13W64-NEXT: s_and_not1_b64 s[0:1], s[0:1], s[6:7]
+; GFX13W64-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX13W64-NEXT: ; %bb.2: ; %ComputeEnd
+; GFX13W64-NEXT: v_mbcnt_lo_u32_b32 v1, exec_lo, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13W64-NEXT: v_mbcnt_hi_u32_b32 v1, exec_hi, v1
+; GFX13W64-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
+; GFX13W64-NEXT: ; implicit-def: $vgpr1
+; GFX13W64-NEXT: s_and_saveexec_b64 s[0:1], vcc
+; GFX13W64-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX13W64-NEXT: s_xor_b64 s[0:1], exec, s[0:1]
+; GFX13W64-NEXT: s_cbranch_execz .LBB3_4
+; GFX13W64-NEXT: ; %bb.3:
+; GFX13W64-NEXT: s_clause 0x1
+; GFX13W64-NEXT: s_load_b32 s3, s[4:5], 0x44 nv
+; GFX13W64-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W64-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: v_mov_b32_e32 v2, s3
+; GFX13W64-NEXT: buffer_atomic_add_u32 v1, v2, s[8:11], null idxen th:TH_ATOMIC_RETURN
+; GFX13W64-NEXT: .LBB3_4:
+; GFX13W64-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX13W64-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W64-NEXT: s_wait_loadcnt 0x0
+; GFX13W64-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W64-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13W64-NEXT: v_add_nc_u32_e32 v0, s2, v0
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W64-NEXT: s_endpgm
+;
+; GFX13W32-LABEL: struct_add_i32_varying_vdata:
+; GFX13W32: ; %bb.0: ; %entry
+; GFX13W32-NEXT: v_and_b32_e32 v1, 0x3ff, v0
+; GFX13W32-NEXT: s_mov_b32 s1, exec_lo
+; GFX13W32-NEXT: s_mov_b32 s0, 0
+; GFX13W32-NEXT: ; implicit-def: $vgpr0
+; GFX13W32-NEXT: .LBB3_1: ; %ComputeLoop
+; GFX13W32-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX13W32-NEXT: s_ctz_i32_b32 s2, s1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: v_readlane_b32 s3, v1, s2
+; GFX13W32-NEXT: v_writelane_b32 v0, s0, s2
+; GFX13W32-NEXT: s_lshl_b32 s2, 1, s2
+; GFX13W32-NEXT: s_add_co_i32 s0, s0, s3
+; GFX13W32-NEXT: s_and_not1_b32 s1, s1, s2
+; GFX13W32-NEXT: s_cbranch_scc1 .LBB3_1
+; GFX13W32-NEXT: ; %bb.2: ; %ComputeEnd
+; GFX13W32-NEXT: v_mbcnt_lo_u32_b32 v1, exec_lo, 0
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
+; GFX13W32-NEXT: ; implicit-def: $vgpr1
+; GFX13W32-NEXT: s_and_saveexec_b32 s1, vcc_lo
+; GFX13W32-NEXT: s_xor_b32 s1, exec_lo, s1
+; GFX13W32-NEXT: s_cbranch_execz .LBB3_4
+; GFX13W32-NEXT: ; %bb.3:
+; GFX13W32-NEXT: s_clause 0x1
+; GFX13W32-NEXT: s_load_b32 s2, s[4:5], 0x44 nv
+; GFX13W32-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s2
+; GFX13W32-NEXT: buffer_atomic_add_u32 v1, v2, s[8:11], null idxen th:TH_ATOMIC_RETURN
+; GFX13W32-NEXT: .LBB3_4:
+; GFX13W32-NEXT: s_or_b32 exec_lo, exec_lo, s1
+; GFX13W32-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W32-NEXT: s_wait_loadcnt 0x0
+; GFX13W32-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, s2, v0
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W32-NEXT: s_endpgm
entry:
%lane = call i32 @llvm.amdgcn.workitem.id.x()
%old = call i32 @llvm.amdgcn.struct.ptr.buffer.atomic.add(i32 %lane, ptr addrspace(8) %inout, i32 %vindex, i32 0, i32 0, i32 0)
@@ -1441,6 +1734,20 @@ define amdgpu_kernel void @add_i32_varying_offset(ptr addrspace(1) %out, ptr add
; GFX12W32-NEXT: s_wait_kmcnt 0x0
; GFX12W32-NEXT: global_store_b32 v0, v1, s[0:1]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13-LABEL: add_i32_varying_offset:
+; GFX13: ; %bb.0: ; %entry
+; GFX13-NEXT: s_load_b128 s[0:3], s[4:5], 0x34 nv
+; GFX13-NEXT: v_and_b32_e32 v0, 0x3ff, v0
+; GFX13-NEXT: v_mov_b32_e32 v1, 1
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: buffer_atomic_add_u32 v1, v0, s[0:3], null offen th:TH_ATOMIC_RETURN
+; GFX13-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13-NEXT: v_mov_b32_e32 v0, 0
+; GFX13-NEXT: s_wait_loadcnt 0x0
+; GFX13-NEXT: s_wait_kmcnt 0x0
+; GFX13-NEXT: global_store_b32 v0, v1, s[0:1]
+; GFX13-NEXT: s_endpgm
entry:
%lane = call i32 @llvm.amdgcn.workitem.id.x()
%old = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.add(i32 1, ptr addrspace(8) %inout, i32 %lane, i32 0, i32 0)
@@ -1716,6 +2023,66 @@ define amdgpu_kernel void @sub_i32_constant(ptr addrspace(1) %out, ptr addrspace
; GFX12W32-NEXT: s_wait_kmcnt 0x0
; GFX12W32-NEXT: global_store_b32 v1, v0, s[0:1]
; GFX12W32-NEXT: s_endpgm
+;
+; GFX13W64-LABEL: sub_i32_constant:
+; GFX13W64: ; %bb.0: ; %entry
+; GFX13W64-NEXT: s_mov_b64 s[2:3], exec
+; GFX13W64-NEXT: s_mov_b64 s[0:1], exec
+; GFX13W64-NEXT: v_mbcnt_lo_u32_b32 v0, s2, 0
+; GFX13W64-NEXT: ; implicit-def: $vgpr1
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX13W64-NEXT: v_mbcnt_hi_u32_b32 v0, s3, v0
+; GFX13W64-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W64-NEXT: s_cbranch_execz .LBB5_2
+; GFX13W64-NEXT: ; %bb.1:
+; GFX13W64-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W64-NEXT: s_bcnt1_i32_b64 s2, s[2:3]
+; GFX13W64-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX13W64-NEXT: s_mul_i32 s2, s2, 5
+; GFX13W64-NEXT: v_mov_b32_e32 v1, s2
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: buffer_atomic_sub_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W64-NEXT: .LBB5_2:
+; GFX13W64-NEXT: s_or_b64 exec, exec, s[0:1]
+; GFX13W64-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W64-NEXT: s_wait_loadcnt 0x0
+; GFX13W64-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W64-NEXT: v_mul_u32_u24_e32 v0, 5, v0
+; GFX13W64-NEXT: v_mov_b32_e32 v1, 0
+; GFX13W64-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX13W64-NEXT: v_sub_nc_u32_e32 v0, s2, v0
+; GFX13W64-NEXT: s_wait_kmcnt 0x0
+; GFX13W64-NEXT: global_store_b32 v1, v0, s[0:1]
+; GFX13W64-NEXT: s_endpgm
+;
+; GFX13W32-LABEL: sub_i32_constant:
+; GFX13W32: ; %bb.0: ; %entry
+; GFX13W32-NEXT: s_mov_b32 s1, exec_lo
+; GFX13W32-NEXT: s_mov_b32 s0, exec_lo
+; GFX13W32-NEXT: v_mbcnt_lo_u32_b32 v0, s1, 0
+; GFX13W32-NEXT: ; implicit-def: $vgpr1
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_cmpx_eq_u32_e32 0, v0
+; GFX13W32-NEXT: s_cbranch_execz .LBB5_2
+; GFX13W32-NEXT: ; %bb.1:
+; GFX13W32-NEXT: s_load_b128 s[8:11], s[4:5], 0x34 nv
+; GFX13W32-NEXT: s_bcnt1_i32_b32 s1, s1
+; GFX13W32-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX13W32-NEXT: s_mul_i32 s1, s1, 5
+; GFX13W32-NEXT: v_mov_b32_e32 v1, s1
+; GFX13W32-NEXT: s_wait_kmcnt 0x0
+; GFX13W32-NEXT: buffer_atomic_sub_u32 v1, off, s[8:11], null th:TH_ATOMIC_RETURN
+; GFX13W32-NEXT: .LBB5_2:
+; GFX13W32-NEXT: s_or_b32 exec_lo, exec_lo, s0
+; GFX13W32-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 nv
+; GFX13W32-NEXT: s_wait_loadcnt 0x0
+; GFX13W32-NEXT: v_readfirstlane_b32 s2, v1
+; GFX13W32-NEXT: v_mul_u32_u24_e32 v0, 5, v0
+; GFX13W32-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX13W32-NEXT: v_dual_mov_b32 v1, 0...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/201299
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