[llvm] [AARCH64][CostModel] - Amortize sdiv costs to allow for loops with predicated sdivs to vectorize (PR #201296)

[Luke Lau via llvm-commits]

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lukel97 wrote:

I don't think we should be making assumptions about the microarchitecture in the loop vectorizer. Can this be solved by discounting the vector division throughput for your processor in the AArch64 TTI?

https://github.com/llvm/llvm-project/pull/201296