[llvm] [LoongArch] Fix FP_EXTEND legalization for v2f32 (PR #201260)

[via llvm-commits]

https://github.com/wangleiat created https://github.com/llvm/llvm-project/pull/201260

FP_EXTEND may reach ReplaceNodeResults due to a Custom action for
v2f32 results, but no target-specific lowering is required.

Fixes #198339


>From 49bf4fab7a3380fb639aef5219071def7b461c77 Mon Sep 17 00:00:00 2001
From: Ray Wang <wangray1021 at gmail.com>
Date: Wed, 3 Jun 2026 11:55:32 +0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.7
---
 .../LoongArch/LoongArchISelLowering.cpp       |  5 ++
 llvm/test/CodeGen/LoongArch/pr198339.ll       | 49 +++++++++++++++++++
 2 files changed, 54 insertions(+)
 create mode 100644 llvm/test/CodeGen/LoongArch/pr198339.ll

diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 561064b3e1090..0a80a88122c2c 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -5860,6 +5860,11 @@ void LoongArchTargetLowering::ReplaceNodeResults(
     Results.push_back(DAG.getNode(ISD::CONCAT_VECTORS, DL, DstVT, Blocks));
     break;
   }
+  case ISD::FP_EXTEND:
+    // FP_EXTEND may reach here due to the Custom action for v2f32 results, but
+    // no target-specific lowering is required. Leave it unchanged and rely on
+    // the default type legalization.
+    break;
   }
 }
 
diff --git a/llvm/test/CodeGen/LoongArch/pr198339.ll b/llvm/test/CodeGen/LoongArch/pr198339.ll
new file mode 100644
index 0000000000000..08505b7ba6ab2
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/pr198339.ll
@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK-32
+; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK-64
+
+define <2 x float> @repro(<2 x half> %x) nounwind {
+; CHECK-32-LABEL: repro:
+; CHECK-32:       # %bb.0:
+; CHECK-32-NEXT:    addi.w $sp, $sp, -32
+; CHECK-32-NEXT:    st.w $ra, $sp, 28 # 4-byte Folded Spill
+; CHECK-32-NEXT:    fst.d $fs0, $sp, 16 # 8-byte Folded Spill
+; CHECK-32-NEXT:    movgr2fr.w $fs0, $a0
+; CHECK-32-NEXT:    movgr2fr.w $fa0, $a1
+; CHECK-32-NEXT:    bl __extendhfsf2
+; CHECK-32-NEXT:    # kill: def $f0 killed $f0 def $vr0
+; CHECK-32-NEXT:    vst $vr0, $sp, 0 # 16-byte Folded Spill
+; CHECK-32-NEXT:    fmov.s $fa0, $fs0
+; CHECK-32-NEXT:    bl __extendhfsf2
+; CHECK-32-NEXT:    # kill: def $f0 killed $f0 def $vr0
+; CHECK-32-NEXT:    vld $vr1, $sp, 0 # 16-byte Folded Reload
+; CHECK-32-NEXT:    vextrins.w $vr0, $vr1, 16
+; CHECK-32-NEXT:    fld.d $fs0, $sp, 16 # 8-byte Folded Reload
+; CHECK-32-NEXT:    ld.w $ra, $sp, 28 # 4-byte Folded Reload
+; CHECK-32-NEXT:    addi.w $sp, $sp, 32
+; CHECK-32-NEXT:    ret
+;
+; CHECK-64-LABEL: repro:
+; CHECK-64:       # %bb.0:
+; CHECK-64-NEXT:    addi.d $sp, $sp, -32
+; CHECK-64-NEXT:    st.d $ra, $sp, 24 # 8-byte Folded Spill
+; CHECK-64-NEXT:    st.d $fp, $sp, 16 # 8-byte Folded Spill
+; CHECK-64-NEXT:    move $fp, $a0
+; CHECK-64-NEXT:    movgr2fr.w $fa0, $a1
+; CHECK-64-NEXT:    pcaddu18i $ra, %call36(__extendhfsf2)
+; CHECK-64-NEXT:    jirl $ra, $ra, 0
+; CHECK-64-NEXT:    # kill: def $f0 killed $f0 def $vr0
+; CHECK-64-NEXT:    vst $vr0, $sp, 0 # 16-byte Folded Spill
+; CHECK-64-NEXT:    movgr2fr.w $fa0, $fp
+; CHECK-64-NEXT:    pcaddu18i $ra, %call36(__extendhfsf2)
+; CHECK-64-NEXT:    jirl $ra, $ra, 0
+; CHECK-64-NEXT:    # kill: def $f0 killed $f0 def $vr0
+; CHECK-64-NEXT:    vld $vr1, $sp, 0 # 16-byte Folded Reload
+; CHECK-64-NEXT:    vextrins.w $vr0, $vr1, 16
+; CHECK-64-NEXT:    ld.d $fp, $sp, 16 # 8-byte Folded Reload
+; CHECK-64-NEXT:    ld.d $ra, $sp, 24 # 8-byte Folded Reload
+; CHECK-64-NEXT:    addi.d $sp, $sp, 32
+; CHECK-64-NEXT:    ret
+  %y = fpext <2 x half> %x to <2 x float>
+  ret <2 x float> %y
+}