[llvm] ff1c751 - [AMDGPU][docs][NFC] Update gfx12 documentation (#200976)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 2 11:55:42 PDT 2026
Author: Jun Wang
Date: 2026-06-02T11:55:36-07:00
New Revision: ff1c751223a0e99a4563743abaaa5faa50d2ed6e
URL: https://github.com/llvm/llvm-project/commit/ff1c751223a0e99a4563743abaaa5faa50d2ed6e
DIFF: https://github.com/llvm/llvm-project/commit/ff1c751223a0e99a4563743abaaa5faa50d2ed6e.diff
LOG: [AMDGPU][docs][NFC] Update gfx12 documentation (#200976)
Following what we did with the GFX950 documentation, this patch replaces
the multitude of rst files for GFX12 operands with a single file. Some
problems are fixed as well, e.g., different opcodes in the same encoding
(e.g., VDS) may have different modifiers.
Added:
llvm/docs/AMDGPU/gfx12_operands.rst
Modified:
llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
Removed:
llvm/docs/AMDGPU/gfx12_addr.rst
llvm/docs/AMDGPU/gfx12_attr.rst
llvm/docs/AMDGPU/gfx12_clause.rst
llvm/docs/AMDGPU/gfx12_data0_56f215.rst
llvm/docs/AMDGPU/gfx12_data0_6802ce.rst
llvm/docs/AMDGPU/gfx12_data0_e016a1.rst
llvm/docs/AMDGPU/gfx12_data0_fd235e.rst
llvm/docs/AMDGPU/gfx12_data1_6802ce.rst
llvm/docs/AMDGPU/gfx12_data1_731030.rst
llvm/docs/AMDGPU/gfx12_data1_e016a1.rst
llvm/docs/AMDGPU/gfx12_data1_fd235e.rst
llvm/docs/AMDGPU/gfx12_delay.rst
llvm/docs/AMDGPU/gfx12_hwreg.rst
llvm/docs/AMDGPU/gfx12_imm16.rst
llvm/docs/AMDGPU/gfx12_ioffset.rst
llvm/docs/AMDGPU/gfx12_label.rst
llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst
llvm/docs/AMDGPU/gfx12_literal_81e671.rst
llvm/docs/AMDGPU/gfx12_m.rst
llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst
llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst
llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst
llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst
llvm/docs/AMDGPU/gfx12_samp.rst
llvm/docs/AMDGPU/gfx12_sbase_453b95.rst
llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst
llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst
llvm/docs/AMDGPU/gfx12_sdata_354189.rst
llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst
llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst
llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst
llvm/docs/AMDGPU/gfx12_sdata_836716.rst
llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst
llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst
llvm/docs/AMDGPU/gfx12_sdst_006c40.rst
llvm/docs/AMDGPU/gfx12_sdst_20064d.rst
llvm/docs/AMDGPU/gfx12_sdst_354189.rst
llvm/docs/AMDGPU/gfx12_sdst_836716.rst
llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst
llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst
llvm/docs/AMDGPU/gfx12_sendmsg.rst
llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst
llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst
llvm/docs/AMDGPU/gfx12_simm16_218bea.rst
llvm/docs/AMDGPU/gfx12_simm16_39b593.rst
llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst
llvm/docs/AMDGPU/gfx12_simm16_730a13.rst
llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst
llvm/docs/AMDGPU/gfx12_simm16_81e671.rst
llvm/docs/AMDGPU/gfx12_simm16_c98889.rst
llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst
llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst
llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst
llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst
llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst
llvm/docs/AMDGPU/gfx12_src0_5727cf.rst
llvm/docs/AMDGPU/gfx12_src0_5cae62.rst
llvm/docs/AMDGPU/gfx12_src0_6802ce.rst
llvm/docs/AMDGPU/gfx12_src0_85aab6.rst
llvm/docs/AMDGPU/gfx12_src0_c4593f.rst
llvm/docs/AMDGPU/gfx12_src0_e016a1.rst
llvm/docs/AMDGPU/gfx12_src0_fd235e.rst
llvm/docs/AMDGPU/gfx12_src1_5727cf.rst
llvm/docs/AMDGPU/gfx12_src1_5cae62.rst
llvm/docs/AMDGPU/gfx12_src1_6802ce.rst
llvm/docs/AMDGPU/gfx12_src1_731030.rst
llvm/docs/AMDGPU/gfx12_src1_977794.rst
llvm/docs/AMDGPU/gfx12_src1_c4593f.rst
llvm/docs/AMDGPU/gfx12_src1_e016a1.rst
llvm/docs/AMDGPU/gfx12_src1_fd235e.rst
llvm/docs/AMDGPU/gfx12_src2_2797bc.rst
llvm/docs/AMDGPU/gfx12_src2_5727cf.rst
llvm/docs/AMDGPU/gfx12_src2_5cae62.rst
llvm/docs/AMDGPU/gfx12_src2_6802ce.rst
llvm/docs/AMDGPU/gfx12_src2_7b936a.rst
llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst
llvm/docs/AMDGPU/gfx12_src2_c4593f.rst
llvm/docs/AMDGPU/gfx12_src2_e016a1.rst
llvm/docs/AMDGPU/gfx12_srcx0.rst
llvm/docs/AMDGPU/gfx12_srcy0.rst
llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst
llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst
llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst
llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst
llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst
llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst
llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst
llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst
llvm/docs/AMDGPU/gfx12_tgt.rst
llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst
llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst
llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst
llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst
llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst
llvm/docs/AMDGPU/gfx12_vcc.rst
llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst
llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst
llvm/docs/AMDGPU/gfx12_vdata_69a144.rst
llvm/docs/AMDGPU/gfx12_vdata_89680f.rst
llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst
llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst
llvm/docs/AMDGPU/gfx12_vdst_006c40.rst
llvm/docs/AMDGPU/gfx12_vdst_227281.rst
llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst
llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst
llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst
llvm/docs/AMDGPU/gfx12_vdst_69a144.rst
llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst
llvm/docs/AMDGPU/gfx12_vdst_836716.rst
llvm/docs/AMDGPU/gfx12_vdst_89680f.rst
llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst
llvm/docs/AMDGPU/gfx12_vdstx.rst
llvm/docs/AMDGPU/gfx12_vdsty.rst
llvm/docs/AMDGPU/gfx12_version.rst
llvm/docs/AMDGPU/gfx12_vsrc0.rst
llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst
llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst
llvm/docs/AMDGPU/gfx12_vsrc2.rst
llvm/docs/AMDGPU/gfx12_vsrc3.rst
llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst
llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst
llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst
llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst
llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst
llvm/docs/AMDGPU/gfx12_vsrcx1.rst
llvm/docs/AMDGPU/gfx12_vsrcy1.rst
llvm/docs/AMDGPU/gfx12_waitcnt.rst
################################################################################
diff --git a/llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst b/llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
index 7259ee8731300..5ed09d1e95f13 100644
--- a/llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
+++ b/llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
@@ -38,35 +38,34 @@ SMEM
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_atc_probe :ref:`sdata<amdgpu_synid_gfx12_sdata_d725ab>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_atc_probe_buffer :ref:`sdata<amdgpu_synid_gfx12_sdata_d725ab>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b128 :ref:`sdata<amdgpu_synid_gfx12_sdata_4585b8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b256 :ref:`sdata<amdgpu_synid_gfx12_sdata_0974a4>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b32 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b512 :ref:`sdata<amdgpu_synid_gfx12_sdata_6c003b>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b64 :ref:`sdata<amdgpu_synid_gfx12_sdata_354189>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_b96 :ref:`sdata<amdgpu_synid_gfx12_sdata_dd9dd8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_i16 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_i8 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_u16 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_load_u8 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_nop :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_buffer_prefetch_data :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_8ec073>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_atc_probe :ref:`sdata<amdgpu_synid_gfx12_sdata_d725ab>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_atc_probe_buffer :ref:`sdata<amdgpu_synid_gfx12_sdata_d725ab>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b128 :ref:`sdata<amdgpu_synid_gfx12_sdata_4585b8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b256 :ref:`sdata<amdgpu_synid_gfx12_sdata_0974a4>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b32 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b512 :ref:`sdata<amdgpu_synid_gfx12_sdata_6c003b>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b64 :ref:`sdata<amdgpu_synid_gfx12_sdata_386c33>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_b96 :ref:`sdata<amdgpu_synid_gfx12_sdata_dd9dd8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_i16 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_i8 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_u16 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_load_u8 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_buffer_prefetch_data :ref:`sbase<amdgpu_synid_gfx12_sbase_453b95>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_1764b4>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
s_dcache_inv :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b128 :ref:`sdata<amdgpu_synid_gfx12_sdata_4585b8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b256 :ref:`sdata<amdgpu_synid_gfx12_sdata_0974a4>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b32 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b512 :ref:`sdata<amdgpu_synid_gfx12_sdata_6c003b>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b64 :ref:`sdata<amdgpu_synid_gfx12_sdata_354189>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_b96 :ref:`sdata<amdgpu_synid_gfx12_sdata_dd9dd8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_i16 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_i8 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_u16 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_load_u8 :ref:`sdata<amdgpu_synid_gfx12_sdata_836716>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_prefetch_data :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_prefetch_data_pc_rel :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_prefetch_inst :ref:`sbase<amdgpu_synid_gfx12_sbase_47adb7>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- s_prefetch_inst_pc_rel :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ec005a>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b128 :ref:`sdata<amdgpu_synid_gfx12_sdata_4585b8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b256 :ref:`sdata<amdgpu_synid_gfx12_sdata_0974a4>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b32 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b512 :ref:`sdata<amdgpu_synid_gfx12_sdata_6c003b>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b64 :ref:`sdata<amdgpu_synid_gfx12_sdata_386c33>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_b96 :ref:`sdata<amdgpu_synid_gfx12_sdata_dd9dd8>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_i16 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_i8 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_u16 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_load_u8 :ref:`sdata<amdgpu_synid_gfx12_sdata_54e16e>`, :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_prefetch_data :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_prefetch_data_pc_rel :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_prefetch_inst :ref:`sbase<amdgpu_synid_gfx12_sbase_30e75b>`, :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ s_prefetch_inst_pc_rel :ref:`ioffset<amdgpu_synid_gfx12_ioffset>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_ab3dc3>`, :ref:`sdata<amdgpu_synid_gfx12_sdata_5c7b50>` :ref:`offset24s<amdgpu_synid_smem_offset24s>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
SOP1
----
@@ -75,104 +74,90 @@ SOP1
**INSTRUCTION** **DST** **SRC**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_alloc_vgpr :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_not0_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_not0_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_and_not0_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_not0_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_and_not1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_not1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_and_not1_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_not1_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_and_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_barrier_init :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_barrier_join :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
+ s_abs_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_alloc_vgpr :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_not0_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_not0_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_and_not0_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_not0_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_and_not1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_not1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_and_not1_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_not1_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_and_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
s_barrier_signal :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
s_barrier_signal_isfirst :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_brev_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_brev_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_ceil_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_ceil_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cls_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cls_i32_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_clz_i32_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_clz_i32_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_ctz_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_ctz_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_cvt_f16_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_f32_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_f32_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_f32_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_hi_f32_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_i32_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_cvt_u32_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_floor_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_floor_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_get_barrier_state :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_get_lock_state :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`
- s_mov_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_mov_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_mov_fed_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_mov_from_global_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_007f9c>`
- s_mov_from_global_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_2797bc>`
- s_mov_regrd_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_mov_to_global_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_mov_to_global_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_007f9c>`
- s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_2797bc>`
- s_movrelsd_2_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_007f9c>`
- s_nand_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_nor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_not_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_not_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_or_not0_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_or_not0_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_or_not1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_or_not1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_or_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_rfe_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_2797bc>`
- s_rndne_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_rndne_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_sendmsg_rtn_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_245536>`
- s_sendmsg_rtn_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_245536>`
- s_setpc_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_2797bc>`
- s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_sleep_var :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_swap_to_global_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_007f9c>`
- s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_2797bc>`
- s_trunc_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_trunc_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_try_lock :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_unlock :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_wakeup_barrier :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_1a9ca5>`
- s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_xnor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
- s_xor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_836716>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`
- s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`
+ s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_brev_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_brev_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_ceil_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_ceil_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cls_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cls_i32_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_clz_i32_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_clz_i32_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_ctz_i32_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_ctz_i32_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_cvt_f16_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_f32_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_f32_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_f32_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_hi_f32_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_i32_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_cvt_u32_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_floor_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_floor_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`
+ s_mov_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_mov_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_6fbc49>`
+ s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_81ba27>`
+ s_movrelsd_2_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_6fbc49>`
+ s_nand_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_nor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_not_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_not_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_or_not0_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_or_not0_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_or_not1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_or_not1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_or_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_rfe_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_81ba27>`
+ s_rndne_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_rndne_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_sendmsg_rtn_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_19fcd2>`
+ s_sendmsg_rtn_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_19fcd2>`
+ s_setpc_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_81ba27>`
+ s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_sleep_var :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_81ba27>`
+ s_trunc_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_trunc_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_xnor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
+ s_xor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_54e16e>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`
+ s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_386c33>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`
SOP2
----
@@ -181,80 +166,80 @@ SOP2
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_co_ci_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_co_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_add_nc_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_and_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_and_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_and_not1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_and_not1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_cvt_pk_rtz_f16_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_fmaak_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- s_fmac_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_fmac_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_fmamk_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl1_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl2_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl3_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl4_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_max_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_max_num_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_max_num_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_max_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_maximum_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_maximum_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_min_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_min_num_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_min_num_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_min_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_minimum_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_minimum_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_hi_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_hi_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_mul_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_nand_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_nand_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_nor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_nor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_or_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_or_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_or_not1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_or_not1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_pack_hl_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_co_ci_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_co_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_sub_nc_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_xor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_xor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
+ s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_co_ci_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_co_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_add_nc_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_and_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_and_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_and_not1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_and_not1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_cvt_pk_rtz_f16_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_fmaak_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
+ s_fmac_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_fmac_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_fmamk_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl1_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl2_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl3_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl4_add_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_max_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_max_num_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_max_num_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_max_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_maximum_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_maximum_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_min_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_min_num_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_min_num_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_min_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_minimum_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_minimum_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_hi_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_hi_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_mul_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_nand_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_nand_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_nor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_nor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_or_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_or_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_or_not1_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_or_not1_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_pack_hl_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_co_ci_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_co_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_f16 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_f32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_sub_nc_u64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_xor_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_xor_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
SOPC
----
@@ -263,52 +248,52 @@ SOPC
**INSTRUCTION** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_eq_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_eq_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_cmp_ge_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_ge_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_gt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_gt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_le_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_le_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lg_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lg_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_bbb4c6>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_bbb4c6>`
- s_cmp_lt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_neq_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_neq_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nge_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nge_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_ngt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_ngt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nle_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nle_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nlg_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nlg_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nlt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_nlt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_o_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_o_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_u_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
- s_cmp_u_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_c4593f>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_c4593f>`
+ s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_eq_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_eq_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_cmp_ge_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_ge_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_gt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_gt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_le_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_le_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lg_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lg_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_dfa11e>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_dfa11e>`
+ s_cmp_lt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_neq_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_neq_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nge_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nge_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_ngt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_ngt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nle_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nle_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nlg_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nlg_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nlt_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_nlt_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_o_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_o_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_u_f16 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
+ s_cmp_u_f32 :ref:`ssrc0<amdgpu_synid_gfx12_ssrc0_0f3a08>`, :ref:`ssrc1<amdgpu_synid_gfx12_ssrc1_0f3a08>`
SOPK
----
@@ -317,30 +302,15 @@ SOPK
**INSTRUCTION** **DST** **SRC**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_addk_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_call_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_354189>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_eq_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_eq_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_ge_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_ge_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_gt_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_gt_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_le_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_le_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_lg_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_lg_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_lt_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_cmpk_lt_u32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_7ed651>`
- s_getreg_regrd_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_7ed651>`
- s_movk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_setreg_b32 :ref:`simm16<amdgpu_synid_gfx12_simm16_cc1716>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_20064d>`
- s_setreg_imm32_b32 :ref:`simm16<amdgpu_synid_gfx12_simm16_cc1716>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- s_subvector_loop_begin :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_subvector_loop_end :ref:`sdst<amdgpu_synid_gfx12_sdst_ced58d>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_version :ref:`simm16<amdgpu_synid_gfx12_simm16_15ccdd>`
+ s_addk_co_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_call_b64 :ref:`sdst<amdgpu_synid_gfx12_sdst_ea3f10>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_165f69>`
+ s_movk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx12_sdst_8078f5>`, :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_setreg_b32 :ref:`simm16<amdgpu_synid_gfx12_simm16_165f69>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_acfb90>`
+ s_setreg_imm32_b32 :ref:`simm16<amdgpu_synid_gfx12_simm16_165f69>`, :ref:`literal<amdgpu_synid_gfx12_literal_a3e80c>`
+ s_version :ref:`simm16<amdgpu_synid_gfx12_simm16_343e98>`
SOPP
----
@@ -349,56 +319,46 @@ SOPP
**INSTRUCTION** **SRC**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_barrier
- s_barrier_leave
- s_barrier_wait :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_branch :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_cdbgsys :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_cdbgsys_and_user :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_cdbgsys_or_user :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_cdbguser :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_execnz :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_execz :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_scc0 :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_scc1 :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_vccnz :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_cbranch_vccz :ref:`simm16<amdgpu_synid_gfx12_simm16_3d2a4f>`
- s_clause :ref:`simm16<amdgpu_synid_gfx12_simm16_730a13>`
+ s_barrier_wait :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_branch :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_execnz :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_execz :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_scc0 :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_scc1 :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_vccnz :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_cbranch_vccz :ref:`simm16<amdgpu_synid_gfx12_simm16_dff4f4>`
+ s_clause :ref:`simm16<amdgpu_synid_gfx12_simm16_f7832e>`
s_code_end
- s_decperflevel :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_delay_alu :ref:`simm16<amdgpu_synid_gfx12_simm16_c98889>`
- s_denorm_mode :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_decperflevel :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_delay_alu :ref:`simm16<amdgpu_synid_gfx12_simm16_faa0f8>`
+ s_denorm_mode :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_endpgm
- s_endpgm_ordered_ps_done
s_endpgm_saved
s_icache_inv
- s_incperflevel :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_nop :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_round_mode :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_sendmsg :ref:`simm16<amdgpu_synid_gfx12_simm16_ee8b30>`
- s_sendmsghalt :ref:`simm16<amdgpu_synid_gfx12_simm16_ee8b30>`
- s_set_inst_prefetch_distance :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_sethalt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_setkill :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_setprio :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_singleuse_vdst :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
+ s_incperflevel :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_nop :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_round_mode :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_sendmsg :ref:`simm16<amdgpu_synid_gfx12_simm16_8ccd1e>`
+ s_sendmsghalt :ref:`simm16<amdgpu_synid_gfx12_simm16_8ccd1e>`
+ s_sethalt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_setkill :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_setprio :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_sleep :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
- s_trap :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_trap :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_ttracedata
- s_ttracedata_imm :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_ttracedata_imm :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_wait_alu :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
- s_wait_bvhcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_wait_dscnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_wait_bvhcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_wait_dscnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_wait_event :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
- s_wait_expcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_wait_expcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_wait_idle
- s_wait_kmcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_wait_loadcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_wait_kmcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_wait_loadcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_wait_loadcnt_dscnt :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
- s_wait_samplecnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
- s_wait_storecnt :ref:`simm16<amdgpu_synid_gfx12_simm16_39b593>`
+ s_wait_samplecnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
+ s_wait_storecnt :ref:`simm16<amdgpu_synid_gfx12_simm16_ad4155>`
s_wait_storecnt_dscnt :ref:`simm16<amdgpu_synid_gfx12_simm16_81e671>`
- s_waitcnt :ref:`simm16<amdgpu_synid_gfx12_simm16_218bea>`
s_wakeup
VBUFFER
@@ -408,248 +368,226 @@ VBUFFER
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_add_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_add_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_and_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_and_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_cmpswap_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_cmpswap_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_cond_sub_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_dec_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_dec_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_inc_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_inc_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_max_i32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_max_i64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_max_num_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_max_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_max_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_min_i32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_min_i64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_min_num_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_min_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_min_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_or_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_or_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_pk_add_bf16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_sub_clamp_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_sub_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_sub_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_swap_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_swap_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_xor_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_atomic_xor_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_gl0_inv :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_gl1_inv :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_b128 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_b96 :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_block :ref:`vdata<amdgpu_synid_gfx12_vdata_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_hi_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_hi_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_hi_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_hi_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_d16_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_i16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_format_x :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_i16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_i8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_u16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_lds_u8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_u16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_load_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_nop :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b128 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_b96 :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_block :ref:`vdata<amdgpu_synid_gfx12_vdata_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_hi_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_hi_b8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_d16_hi_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_load_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_c5b88c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_add_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_add_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_and_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_and_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_cmpswap_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_cmpswap_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_cond_sub_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_dec_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_dec_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_inc_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_inc_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_max_i32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_max_i64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_max_num_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_max_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_max_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_min_i32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_min_i64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_min_num_f32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_min_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_min_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_or_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_or_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_pk_add_bf16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_sub_clamp_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_sub_u32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_sub_u64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_swap_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_swap_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_xor_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_atomic_xor_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_b128 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_b96 :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_hi_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_hi_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_hi_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_hi_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_d16_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_i16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_i8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_u16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_load_u8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b128 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b32 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b64 :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_b96 :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_hi_b16 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_hi_b8 :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_d16_hi_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_load_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_d16_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_d16_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_d16_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_d16_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx12_vdata_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx12_vdata_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx12_vdata_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_5fe6d8>`, :ref:`soffset<amdgpu_synid_gfx12_soffset_422f18>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
VDS
---
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- ds_add_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_f64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_add_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_and_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_and_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_append :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_fi_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_fi_from_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_fi_to_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_fi_to_simd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_from_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_to_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bpermute_to_simd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bvh_stack_push4_pop1_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_e016a1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bvh_stack_push8_pop1_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_731030>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_bvh_stack_push8_pop2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_731030>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cmpstore_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cmpstore_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cmpstore_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cmpstore_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cond_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_cond_sub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_consume :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_dec_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_dec_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_inc_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_inc_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_2addr_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_2addr_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_2addr_stride64_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_2addr_stride64_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_addtid_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_i8_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_i8_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u16_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u16_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u8_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_load_u8_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_i32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_i64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_num_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_num_f64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_num_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_num_rtn_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_max_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_i32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_i64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_num_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_num_f64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_num_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_num_rtn_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_min_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_mskor_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_mskor_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_nop :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_or_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_or_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_permute_from_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_permute_to_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_permute_to_simd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_pk_add_bf16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_pk_add_f16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_pk_add_rtn_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_pk_add_rtn_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_rsub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_rsub_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_2addr_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_2addr_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_2addr_stride64_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_2addr_stride64_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_addtid_b32 :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b128 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_e016a1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b16_d16_hi :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b8 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b8_d16_hi :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_store_b96 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_56f215>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_2addr_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_2addr_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_2addr_stride64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_2addr_stride64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_storexchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_clamp_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_clamp_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_sub_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_xor_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_xor_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
- ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ ds_add_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_add_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_add_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_and_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_and_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_append :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_bpermute_fi_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_bvh_stack_push4_pop1_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_e016a1>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_bvh_stack_push8_pop1_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_731030>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_bvh_stack_push8_pop2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_731030>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpstore_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpstore_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpstore_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpstore_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cond_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cond_sub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_consume :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_dec_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_dec_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_inc_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_inc_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_2addr_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_load_2addr_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_load_2addr_stride64_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_load_2addr_stride64_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_load_addtid_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_i8_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_i8_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u16_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u16_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u8_d16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_load_u8_d16_hi :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_i32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_i64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_num_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_num_f64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_num_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_num_rtn_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_max_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_i32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_i64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_num_f32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_num_f64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_num_rtn_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_num_rtn_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_min_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_mskor_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_mskor_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_nop :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_or_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_or_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_pk_add_bf16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_pk_add_f16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_pk_add_rtn_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_pk_add_rtn_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_rsub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_rsub_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_2addr_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_store_2addr_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_store_2addr_stride64_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_store_2addr_stride64_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_store_addtid_b32 :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b128 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_e016a1>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b16 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b16_d16_hi :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b8 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b8_d16_hi :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_store_b96 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_56f215>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_storexchg_2addr_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_storexchg_2addr_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_storexchg_2addr_stride64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>`, :ref:`data1<amdgpu_synid_gfx12_data1_6802ce>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_storexchg_2addr_stride64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>`, :ref:`data1<amdgpu_synid_gfx12_data1_fd235e>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>`
+ ds_storexchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_storexchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_clamp_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_clamp_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_u32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_sub_u64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_xor_b32 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_xor_b64 :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_6802ce>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`addr<amdgpu_synid_gfx12_addr>`, :ref:`data0<amdgpu_synid_gfx12_data0_fd235e>` :ref:`offset<amdgpu_synid_ds_offset16>`
VDSDIR
------
@@ -661,31 +599,6 @@ VDSDIR
ds_direct_load :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>` :ref:`wait_va_vdst<amdgpu_synid_wait_va_vdst>` :ref:`wait_vdst<amdgpu_synid_wait_vdst>` :ref:`wait_vm_vsrc<amdgpu_synid_wait_vm_vsrc>`
ds_param_load :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`attr<amdgpu_synid_gfx12_attr>` :ref:`wait_va_vdst<amdgpu_synid_wait_va_vdst>` :ref:`wait_vdst<amdgpu_synid_wait_vdst>` :ref:`wait_vm_vsrc<amdgpu_synid_wait_vm_vsrc>`
-VERIF
------
-
-.. parsed-literal::
-
- **INSTRUCTION**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- fake_s_delay_alu
- fake_s_nop
- fake_s_wait_alu
- fake_s_wait_bvhcnt
- fake_s_wait_dscnt
- fake_s_wait_expcnt
- fake_s_wait_kmcnt
- fake_s_wait_loadcnt
- fake_s_wait_samplecnt
- fake_s_wait_storecnt
- fake_s_waitcnt
- fake_v_nop
- ill_0
- ill_1
- ill_beef
- metadata
- verif_s_adjdelay_alu
-
VEXPORT
-------
@@ -765,75 +678,69 @@ VGLOBAL
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- global_atomic_add_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_add_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_add_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_and_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_and_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_cmpswap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_cmpswap_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_cond_sub_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_dec_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_dec_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_inc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_inc_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_max_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_max_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_max_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_max_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_max_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_min_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_min_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_min_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_min_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_min_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_or_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_ordered_add_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_pk_add_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_sub_clamp_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_sub_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_sub_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_swap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_swap_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_xor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_atomic_xor_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_add_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_add_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_add_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_and_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_and_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_cmpswap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_cmpswap_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_cond_sub_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_dec_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_dec_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_inc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_inc_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_max_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_max_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_max_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_max_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_max_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_min_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_min_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_min_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_min_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_min_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_or_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_ordered_add_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_pk_add_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_sub_clamp_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_sub_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_sub_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_swap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_swap_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_xor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_atomic_xor_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
global_inv :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_addtid_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_block :ref:`vdst<amdgpu_synid_gfx12_vdst_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_hi_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_hi_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_d16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_addtid_b32 :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_i16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_i8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_u16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_lds_u8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_tr_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_tr_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_addtid_b32 :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b128 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b64 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_b96 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_56f215>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_block :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_89fd7b>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_d16_hi_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- global_store_d16_hi_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_cdc95c>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_addtid_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_block :ref:`vdst<amdgpu_synid_gfx12_vdst_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_hi_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_hi_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_d16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_tr_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_tr_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_addtid_b32 :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b128 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b64 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_b96 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_56f215>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_block :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_89fd7b>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_d16_hi_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ global_store_d16_hi_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_f2b449>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_6c410e>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
global_wb :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
global_wbinv :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
@@ -873,8 +780,6 @@ VIMAGE
image_load_mip_pck_sgn :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
image_load_pck :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
image_load_pck_sgn :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- image_rsvd_atomic_umax_8 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- image_rsvd_atomic_umin_8 :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
image_store :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
image_store_mip :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx12_vdata_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_d82160>`, :ref:`rsrc<amdgpu_synid_gfx12_rsrc_c9f929>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`dim<amdgpu_synid_dim>` :ref:`r128<amdgpu_synid_r128>` :ref:`a16<amdgpu_synid_a16>` :ref:`d16<amdgpu_synid_d16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
@@ -899,838 +804,549 @@ VOP1
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cls_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_clz_i32_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cos_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cos_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ctz_i32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_floor_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_nearest_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_f32_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_f32_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_exp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_exp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_floor_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_floor_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_floor_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fract_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fract_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fract_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_log_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_log_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mov_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mov_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mov_fed_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mov_from_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mov_to_global_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_movreld_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_movrels_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_movrelsd_2_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_movrelsd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_nop :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_not_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_not_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_permlane64_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pipeflush :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_readfirstlane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sin_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sin_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_swap_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_swap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_swaprel_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_writelane_regwr_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
+ **INSTRUCTION** **DST** **SRC**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_cls_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_clz_i32_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cos_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cos_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_ctz_i32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_cvt_f32_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_floor_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_cvt_i32_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_nearest_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_pk_f32_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_pk_f32_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_cvt_u32_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_exp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_exp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_floor_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_floor_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_floor_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_fract_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_fract_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_fract_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_log_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_log_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_mov_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_mov_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_movreld_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_movrels_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_movrelsd_2_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_movrelsd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_nop
+ v_not_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_not_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_permlane64_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_pipeflush
+ v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_readfirstlane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_sin_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_sin_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
+ v_swap_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_swap_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_swaprel_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`
+ v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`
+ v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`
VOP2
----
.. parsed-literal::
- **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_and_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_rtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmaak_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmaak_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmaak_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_1f74c7>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmac_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmac_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmamk_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmamk_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fmamk_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`literal<amdgpu_synid_gfx12_literal_1f74c7>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_illegal :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_num_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_num_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_dx9_zero_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_xor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
+ **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_add_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
+ v_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_add_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_add_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_add_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_and_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
+ v_cvt_pk_rtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_fmaak_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`literal<amdgpu_synid_gfx12_literal_ad4155>`
+ v_fmaak_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`literal<amdgpu_synid_gfx12_literal_6f0844>`
+ v_fmac_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_fmamk_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`literal<amdgpu_synid_gfx12_literal_ad4155>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_fmamk_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`literal<amdgpu_synid_gfx12_literal_6f0844>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_max_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_max_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_max_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_max_num_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_max_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_min_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_min_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_min_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_min_num_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_min_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_dx9_zero_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_sub_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
+ v_sub_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_sub_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_sub_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_subrev_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
+ v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_subrev_nc_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_xor_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
VOP3
----
.. parsed-literal::
- **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_nc_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_and_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cndmask_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_2797bc>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_bf8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_fp8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_i16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_norm_i16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_norm_u16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_u16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_sr_bf8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_sr_fp8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot2_bf16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot2_f16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_dx9_zero_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshl_add_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_co_i64_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_co_u64_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximum3_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximum3_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximum_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximumminimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maximumminimum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maxmin_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maxmin_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maxmin_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_maxmin_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimum3_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimum3_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimum_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimummaximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minimummaximum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minmax_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minmax_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minmax_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_minmax_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_e016a1>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_msad_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mullit_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_or3_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_or_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_perm_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_permlane16_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_permlane16_var_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_permlanex16_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_permlanex16_var_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_readlane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_977794>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_readlane_regrd_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_977794>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_exp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_85aab6>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_exp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_log_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_85aab6>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_log_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_rcp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_85aab6>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_rcp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_rsq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_85aab6>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_rsq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_85aab6>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_s_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_836716>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_nc_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_e701cc>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_c4593f>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_977794>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_xad_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_xor3_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_xor_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
+ **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_add3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_add_nc_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_add_nc_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_add_nc_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_and_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`
+ v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cndmask_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_81ba27>`
+ v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_cvt_pk_bf8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_fp8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_i16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_norm_i16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_norm_u16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_u16_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_cvt_sr_bf8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_cvt_sr_fp8_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_dot2_bf16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_dot2_f16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_fma_dx9_zero_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_fma_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_fma_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_fma_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`
+ v_mad_co_i64_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_mad_co_u64_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_mad_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_max_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_max_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_maximum3_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maximum3_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_maximum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_maximum_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`
+ v_maximumminimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maximumminimum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maxmin_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maxmin_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maxmin_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_maxmin_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_med3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_med3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_med3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_med3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_med3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_med3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min3_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_min_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_min_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_minimum3_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minimum3_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_minimum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_minimum_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_420095>`
+ v_minimummaximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minimummaximum_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minmax_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minmax_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minmax_num_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_minmax_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_e016a1>`
+ v_msad_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_mullit_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_or3_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_or_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_perm_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_permlane16_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_0f3a08>`, :ref:`src2<amdgpu_synid_gfx12_src2_0f3a08>`
+ v_permlane16_var_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`
+ v_permlanex16_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_0f3a08>`, :ref:`src2<amdgpu_synid_gfx12_src2_0f3a08>`
+ v_permlanex16_var_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`
+ v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_420095>`
+ v_readlane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_e18ccf>`
+ v_s_exp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_exp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_log_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_log_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_rcp_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_rcp_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_rsq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_rsq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_s_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_54e16e>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`
+ v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_sad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_sad_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_sad_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_sub_nc_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_sub_nc_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_sub_nc_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx12_sdst_3cd7ad>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
+ v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_e18ccf>`
+ v_xad_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_xor3_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>`
+ v_xor_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_1d4114>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`
VOP3P
-----
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_dot2_f32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_f32_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_f32_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_f32_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_f32_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_i32_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot8_i32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_pk_add_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_fma_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_pk_fma_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`, :ref:`src1<amdgpu_synid_gfx12_src1_5cae62>`, :ref:`src2<amdgpu_synid_gfx12_src2_5cae62>`
- v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_mad_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_pk_mad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`, :ref:`src2<amdgpu_synid_gfx12_src2_5727cf>`
- v_pk_max_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_max_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_max_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_maximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_min_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_min_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_min_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_minimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_mul_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_sub_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_pk_sub_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`, :ref:`src1<amdgpu_synid_gfx12_src1_5727cf>`
- v_swmmac_bf16_16x16x32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f16_16x16x32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_f32_16x16x32_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_i32_16x16x32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_i32_16x16x32_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_swmmac_i32_16x16x64_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>`
- v_wmma_bf16_16x16x16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_7b936a>`
- v_wmma_f16_16x16x16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_7b936a>`
- v_wmma_f32_16x16x16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_f32_16x16x16_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_f32_16x16x16_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_f32_16x16x16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_f32_16x16x16_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_f32_16x16x16_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_i32_16x16x16_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_i32_16x16x16_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
- v_wmma_i32_16x16x32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>`
+ **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_dot2_f32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_f32_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_f32_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_f32_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_f32_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_i32_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot8_i32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_fma_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mad_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mad_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>`, :ref:`src2<amdgpu_synid_gfx12_src2_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_max_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_max_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_max_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_maximum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_min_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_min_num_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_min_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_minimum_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mul_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_sub_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_sub_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`src1<amdgpu_synid_gfx12_src1_7987e4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_bf16_16x16x32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f16_16x16x32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_731030>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_f32_16x16x32_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_i32_16x16x32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_i32_16x16x32_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_swmmac_i32_16x16x64_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_47d3bc>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_6802ce>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_bf16_16x16x16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_7b936a>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f16_16x16x16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_7b936a>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_bf16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_bf8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_bf8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_e016a1>`, :ref:`src1<amdgpu_synid_gfx12_src1_e016a1>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_fp8_bf8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_f32_16x16x16_fp8_fp8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_i32_16x16x16_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_6802ce>`, :ref:`src1<amdgpu_synid_gfx12_src1_6802ce>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_i32_16x16x16_iu8 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_wmma_i32_16x16x32_iu4 :ref:`vdst<amdgpu_synid_gfx12_vdst_227281>`, :ref:`src0<amdgpu_synid_gfx12_src0_fd235e>`, :ref:`src1<amdgpu_synid_gfx12_src1_fd235e>`, :ref:`src2<amdgpu_synid_gfx12_src2_96fbd3>` :ref:`clamp<amdgpu_synid_clamp>`
VOPC
----
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_cmp_class_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_class_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_class_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ne_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ne_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5727cf>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_5cae62>`::ref:`m<amdgpu_synid_gfx12_m>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`::ref:`m<amdgpu_synid_gfx12_m>` :ref:`omod<amdgpu_synid_omod>` :ref:`clamp<amdgpu_synid_clamp>`
-
-VOPD
-----
-
-.. parsed-literal::
-
- **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **SRC3** **SRC4** **SRC5**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_dual_add_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_add_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_add_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_add_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_add_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_add_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_cndmask_b32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_cndmask_b32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_cndmask_b32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_cndmask_b32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_dot2acc_f32_bf16_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_dot2acc_f32_bf16_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_dot2acc_f32_bf16_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_dot2acc_f32_bf16_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_dot2acc_f32_bf16_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_bf16_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_dot2acc_f32_f16_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_dot2acc_f32_f16_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_dot2acc_f32_f16_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_dot2acc_f32_f16_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_dot2acc_f32_f16_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmaak_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmaak_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmac_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_fmac_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmac_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmac_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_fmac_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmac_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_fmamk_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_fmamk_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_max_num_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_max_num_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_max_num_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_max_num_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_max_num_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_max_num_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_min_num_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_min_num_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_min_num_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_min_num_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_min_num_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_mov_b32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mov_b32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mov_b32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_mov_b32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mov_b32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_mul_dx9_zero_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mul_dx9_zero_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mul_dx9_zero_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_mul_dx9_zero_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_dx9_zero_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_mul_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mul_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_mul_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_mul_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_mul_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_sub_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_sub_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_sub_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_sub_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_sub_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_add_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_add_nc_u32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_and_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_cndmask_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`vcc<amdgpu_synid_gfx12_vcc>`
- v_dual_subrev_f32_x_dot2acc_f32_bf16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_dot2acc_f32_f16 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_fmaak_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_subrev_f32_x_fmac_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_fmamk_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`, :ref:`literal<amdgpu_synid_gfx12_literal_81e671>`
- v_dual_subrev_f32_x_lshlrev_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_max_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_min_num_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_mov_b32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`
- v_dual_subrev_f32_x_mul_dx9_zero_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_mul_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_sub_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
- v_dual_subrev_f32_x_subrev_f32 :ref:`vdstx<amdgpu_synid_gfx12_vdstx>`, :ref:`vdsty<amdgpu_synid_gfx12_vdsty>`, :ref:`srcx0<amdgpu_synid_gfx12_srcx0>`, :ref:`vsrcx1<amdgpu_synid_gfx12_vsrcx1>`, :ref:`srcy0<amdgpu_synid_gfx12_srcy0>`, :ref:`vsrcy1<amdgpu_synid_gfx12_vsrcy1>`
+ **INSTRUCTION** **DST** **SRC0** **SRC1**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ v_cmp_class_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_class_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_class_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_eq_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_eq_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_eq_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ge_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ge_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ge_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_gt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_gt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_gt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_gt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_le_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_le_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_le_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_le_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_lg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_lt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_lt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_lt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_lt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ne_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ne_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ne_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ne_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ne_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ne_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_neq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_neq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_neq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_nge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_ngt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ngt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_ngt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_nle_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nle_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nle_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_nlg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nlg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nlg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_nlt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nlt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_nlt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_o_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_o_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_o_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmp_u_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_u_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmp_u_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_006c40>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_class_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_class_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_class_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_eq_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_eq_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_eq_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ge_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ge_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ge_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_gt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_gt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_gt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_gt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_le_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_le_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_le_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_le_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_lg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_lt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_lt_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_lt_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_lt_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ne_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ne_i32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ne_i64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ne_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ne_u32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ne_u64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_neq_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_neq_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_neq_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_nge_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nge_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nge_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_ngt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ngt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_ngt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_nle_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nle_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nle_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_nlg_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nlg_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nlg_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_nlt_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nlt_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_nlt_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_o_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_o_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_o_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
+ v_cmpx_u_f16 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_u_f32 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_7987e4>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_6802ce>`
+ v_cmpx_u_f64 :ref:`vdst<amdgpu_synid_gfx12_vdst_7de8e7>`, :ref:`src0<amdgpu_synid_gfx12_src0_420095>`, :ref:`vsrc1<amdgpu_synid_gfx12_vsrc1_fd235e>`
VOPDX
-----
@@ -1838,165 +1454,34 @@ VSCRATCH
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- scratch_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_block :ref:`vdst<amdgpu_synid_gfx12_vdst_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_hi_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_hi_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_d16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_lds_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_lds_i16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_lds_i8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_lds_u16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_lds_u8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b128 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b64 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_b96 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_56f215>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_block :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_89fd7b>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_d16_hi_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
- scratch_store_d16_hi_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_d42b64>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_b128 :ref:`vdst<amdgpu_synid_gfx12_vdst_69a144>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_b32 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_b64 :ref:`vdst<amdgpu_synid_gfx12_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_b96 :ref:`vdst<amdgpu_synid_gfx12_vdst_48e42f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_block :ref:`vdst<amdgpu_synid_gfx12_vdst_2eda77>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_hi_b16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_hi_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_hi_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_d16_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_i16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_i8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_u16 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_load_u8 :ref:`vdst<amdgpu_synid_gfx12_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b128 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_e016a1>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b32 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b64 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_fd235e>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_b96 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_56f215>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_block :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_89fd7b>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_d16_hi_b16 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
+ scratch_store_d16_hi_b8 :ref:`vaddr<amdgpu_synid_gfx12_vaddr_c8b8d4>`, :ref:`vsrc<amdgpu_synid_gfx12_vsrc_6802ce>`, :ref:`saddr<amdgpu_synid_gfx12_saddr_8ad588>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`th<amdgpu_synid_th>` :ref:`scope<amdgpu_synid_scope>` :ref:`nv<amdgpu_synid_nv>`
.. |---| unicode:: U+02014 .. em dash
.. toctree::
:hidden:
- gfx12_addr
- gfx12_attr
- gfx12_data0_56f215
- gfx12_data0_6802ce
- gfx12_data0_e016a1
- gfx12_data0_fd235e
- gfx12_data1_6802ce
- gfx12_data1_731030
- gfx12_data1_e016a1
- gfx12_data1_fd235e
- gfx12_ioffset
- gfx12_literal_1f74c7
- gfx12_literal_81e671
- gfx12_m
- gfx12_rsrc_5fe6d8
- gfx12_rsrc_c9f929
- gfx12_saddr_cdc95c
- gfx12_saddr_d42b64
- gfx12_samp
- gfx12_sbase_453b95
- gfx12_sbase_47adb7
- gfx12_sdata_0974a4
- gfx12_sdata_354189
- gfx12_sdata_4585b8
- gfx12_sdata_5c7b50
- gfx12_sdata_6c003b
- gfx12_sdata_836716
- gfx12_sdata_d725ab
- gfx12_sdata_dd9dd8
- gfx12_sdst_006c40
- gfx12_sdst_20064d
- gfx12_sdst_354189
- gfx12_sdst_836716
- gfx12_sdst_ced58d
- gfx12_sdst_e701cc
- gfx12_simm16_15ccdd
- gfx12_simm16_218bea
- gfx12_simm16_39b593
- gfx12_simm16_3d2a4f
- gfx12_simm16_730a13
- gfx12_simm16_7ed651
- gfx12_simm16_81e671
- gfx12_simm16_c98889
- gfx12_simm16_cc1716
- gfx12_simm16_ee8b30
- gfx12_soffset_8ec073
- gfx12_soffset_c5b88c
- gfx12_soffset_ec005a
- gfx12_src0_5727cf
- gfx12_src0_5cae62
- gfx12_src0_6802ce
- gfx12_src0_85aab6
- gfx12_src0_c4593f
- gfx12_src0_e016a1
- gfx12_src0_fd235e
- gfx12_src1_5727cf
- gfx12_src1_5cae62
- gfx12_src1_6802ce
- gfx12_src1_731030
- gfx12_src1_977794
- gfx12_src1_c4593f
- gfx12_src1_e016a1
- gfx12_src1_fd235e
- gfx12_src2_2797bc
- gfx12_src2_5727cf
- gfx12_src2_5cae62
- gfx12_src2_6802ce
- gfx12_src2_7b936a
- gfx12_src2_96fbd3
- gfx12_src2_c4593f
- gfx12_src2_e016a1
- gfx12_srcx0
- gfx12_srcy0
- gfx12_ssrc0_007f9c
- gfx12_ssrc0_1a9ca5
- gfx12_ssrc0_245536
- gfx12_ssrc0_2797bc
- gfx12_ssrc0_bbb4c6
- gfx12_ssrc0_c4593f
- gfx12_ssrc1_bbb4c6
- gfx12_ssrc1_c4593f
- gfx12_tgt
- gfx12_vaddr_a972b9
- gfx12_vaddr_c12f43
- gfx12_vaddr_c8b8d4
- gfx12_vaddr_d82160
- gfx12_vaddr_f2b449
- gfx12_vcc
- gfx12_vdata_2eda77
- gfx12_vdata_48e42f
- gfx12_vdata_69a144
- gfx12_vdata_89680f
- gfx12_vdata_aac3e8
- gfx12_vdata_bdb32f
- gfx12_vdst_006c40
- gfx12_vdst_227281
- gfx12_vdst_2eda77
- gfx12_vdst_47d3bc
- gfx12_vdst_48e42f
- gfx12_vdst_69a144
- gfx12_vdst_7de8e7
- gfx12_vdst_836716
- gfx12_vdst_89680f
- gfx12_vdst_bdb32f
- gfx12_vdstx
- gfx12_vdsty
- gfx12_vsrc0
- gfx12_vsrc1_6802ce
- gfx12_vsrc1_fd235e
- gfx12_vsrc2
- gfx12_vsrc3
- gfx12_vsrc_56f215
- gfx12_vsrc_6802ce
- gfx12_vsrc_89fd7b
- gfx12_vsrc_e016a1
- gfx12_vsrc_fd235e
- gfx12_vsrcx1
- gfx12_vsrcy1
- gfx12_clause
- gfx12_delay
- gfx12_hwreg
- gfx12_imm16
- gfx12_label
- gfx12_sendmsg
- gfx12_sendmsg_rtn
- gfx12_version
- gfx12_waitcnt
+ gfx12_operands
diff --git a/llvm/docs/AMDGPU/gfx12_addr.rst b/llvm/docs/AMDGPU/gfx12_addr.rst
deleted file mode 100644
index d2fc0e0cb2f4b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_addr.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_addr:
-
-addr
-====
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_attr.rst b/llvm/docs/AMDGPU/gfx12_attr.rst
deleted file mode 100644
index a6c5c275b349f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_attr.rst
+++ /dev/null
@@ -1,28 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_attr:
-
-attr
-====
-
-Interpolation attribute and channel:
-
- ============== ===================================
- Syntax Description
- ============== ===================================
- attr{0..32}.x Attribute 0..32 with *x* channel.
- attr{0..32}.y Attribute 0..32 with *y* channel.
- attr{0..32}.z Attribute 0..32 with *z* channel.
- attr{0..32}.w Attribute 0..32 with *w* channel.
- ============== ===================================
-
-Examples:
-
-.. parsed-literal::
-
- ds_param_load v1, attr0.x
diff --git a/llvm/docs/AMDGPU/gfx12_clause.rst b/llvm/docs/AMDGPU/gfx12_clause.rst
deleted file mode 100644
index 88feb3b1d9974..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_clause.rst
+++ /dev/null
@@ -1,7 +0,0 @@
-.. _amdgpu_synid_clause:
-
-clause
-======
-
-Description of a clause following this instruction.
-
diff --git a/llvm/docs/AMDGPU/gfx12_data0_56f215.rst b/llvm/docs/AMDGPU/gfx12_data0_56f215.rst
deleted file mode 100644
index d8dde0013ed64..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data0_56f215.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data0_56f215:
-
-data0
-=====
-
-Instruction input.
-
-*Size:* 3 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data0_6802ce.rst b/llvm/docs/AMDGPU/gfx12_data0_6802ce.rst
deleted file mode 100644
index 02fe36f489229..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data0_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data0_6802ce:
-
-data0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data0_e016a1.rst b/llvm/docs/AMDGPU/gfx12_data0_e016a1.rst
deleted file mode 100644
index 914715bf30ea9..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data0_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data0_e016a1:
-
-data0
-=====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data0_fd235e.rst b/llvm/docs/AMDGPU/gfx12_data0_fd235e.rst
deleted file mode 100644
index 7617c61a94be3..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data0_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data0_fd235e:
-
-data0
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data1_6802ce.rst b/llvm/docs/AMDGPU/gfx12_data1_6802ce.rst
deleted file mode 100644
index 318db2daaeec3..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data1_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data1_6802ce:
-
-data1
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data1_731030.rst b/llvm/docs/AMDGPU/gfx12_data1_731030.rst
deleted file mode 100644
index 1a6eda65328ae..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data1_731030.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data1_731030:
-
-data1
-=====
-
-Instruction input.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data1_e016a1.rst b/llvm/docs/AMDGPU/gfx12_data1_e016a1.rst
deleted file mode 100644
index dee4148c3d6d1..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data1_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data1_e016a1:
-
-data1
-=====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_data1_fd235e.rst b/llvm/docs/AMDGPU/gfx12_data1_fd235e.rst
deleted file mode 100644
index c8d4a88857d1f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_data1_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_data1_fd235e:
-
-data1
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_delay.rst b/llvm/docs/AMDGPU/gfx12_delay.rst
deleted file mode 100644
index 600ece7fccfc5..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_delay.rst
+++ /dev/null
@@ -1,74 +0,0 @@
-.. _amdgpu_synid_delay:
-
-delay
-=====
-
-A delay between dependent SALU/VALU instructions.
-This operand may specify a delay for 2 instructions:
-the one after the current *s_delay_alu* instruction
-and for the second instruction indicated by *SKIP*.
-
-The bits of this operand have the following meaning:
-
- ===== ========================================================== ============
- Bits Description Value Range
- ===== ========================================================== ============
- 3:0 ID0: indicates a delay for the first instruction. 0..11
- 6:4 SKIP: indicates the position of the second instruction. 0..5
- 10:7 ID1: indicates a delay for the second instruction. 0..11
- ===== ========================================================== ============
-
-This operand may be specified as one of the following:
-
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* A combination of *instid0*, *instskip*, *instid1* values described below.
-
- ======================== =========================== ===============
- Syntax Description Default Value
- ======================== =========================== ===============
- instid0(<*ID name*>) A symbolic *ID0* value. instid0(NO_DEP)
- instskip(<*SKIP name*>) A symbolic *SKIP* value. instskip(SAME)
- instid1(<*ID name*>) A symbolic *ID1* value. instid1(NO_DEP)
- ======================== =========================== ===============
-
-These values may be specified in any order.
-When more than one value is specified, the values must be separated from each other by a '|'.
-
-Valid *ID names* are defined below.
-
- =================== ===================================================================
- Name Description
- =================== ===================================================================
- NO_DEP No dependency on any prior instruction. This is the default value.
- VALU_DEP_1 Dependency on a previous VALU instruction, 1 opcode back.
- VALU_DEP_2 Dependency on a previous VALU instruction, 2 opcodes back.
- VALU_DEP_3 Dependency on a previous VALU instruction, 3 opcodes back.
- VALU_DEP_4 Dependency on a previous VALU instruction, 4 opcodes back.
- TRANS32_DEP_1 Dependency on a previous TRANS32 instruction, 1 opcode back.
- TRANS32_DEP_2 Dependency on a previous TRANS32 instruction, 2 opcodes back.
- TRANS32_DEP_3 Dependency on a previous TRANS32 instruction, 3 opcodes back.
- FMA_ACCUM_CYCLE_1 Single cycle penalty for FMA accumulation.
- SALU_CYCLE_1 1 cycle penalty for a prior SALU instruction.
- SALU_CYCLE_2 2 cycle penalty for a prior SALU instruction.
- SALU_CYCLE_3 3 cycle penalty for a prior SALU instruction.
- =================== ===================================================================
-
-Legal *SKIP names* are described in the following table.
-
- ======== ============================================================================
- Name Description
- ======== ============================================================================
- SAME Apply second dependency to the same instruction. This is the default value.
- NEXT Apply second dependency to the next instruction.
- SKIP_1 Skip 1 instruction then apply dependency.
- SKIP_2 Skip 2 instructions then apply dependency.
- SKIP_3 Skip 3 instructions then apply dependency.
- SKIP_4 Skip 4 instructions then apply dependency.
- ======== ============================================================================
-
-Examples:
-
-.. parsed-literal::
-
- s_delay_alu instid0(VALU_DEP_1)
- s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
diff --git a/llvm/docs/AMDGPU/gfx12_hwreg.rst b/llvm/docs/AMDGPU/gfx12_hwreg.rst
deleted file mode 100644
index d99cb20df24ae..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_hwreg.rst
+++ /dev/null
@@ -1,76 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_hwreg:
-
-hwreg
-=====
-
-Bits of a hardware register being accessed.
-
-The bits of this operand have the following meaning:
-
- ======= ===================== ============
- Bits Description Value Range
- ======= ===================== ============
- 5:0 Register *id*. 0..63
- 10:6 First bit *offset*. 0..31
- 15:11 *Size* in bits. 1..32
- ======= ===================== ============
-
-This operand may be specified as one of the following:
-
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* An *hwreg* value described below.
-
- ==================================== ============================================================================
- Hwreg Value Syntax Description
- ==================================== ============================================================================
- hwreg({0..63}) All bits of a register indicated by its *id*.
- hwreg(<*name*>) All bits of a register indicated by its *name*.
- hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by register *id*, first bit *offset* and *size*.
- hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by register *name*, first bit *offset* and *size*.
- ==================================== ============================================================================
-
-Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
-or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
-
-Defined register *names* include:
-
- =================== ==========================================
- Name Description
- =================== ==========================================
- HW_REG_MODE Shader writeable mode bits.
- HW_REG_STATUS Shader read-only status.
- HW_REG_TRAPSTS Trap status.
- HW_REG_HW_ID1 Id of wave, simd, compute unit, etc.
- HW_REG_HW_ID2 Id of queue, pipeline, etc.
- HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
- HW_REG_LDS_ALLOC Per-wave LDS allocation.
- HW_REG_IB_STS Counters of outstanding instructions.
- HW_REG_SH_MEM_BASES Memory aperture.
- HW_REG_FLAT_SCR_LO flat_scratch_lo register.
- HW_REG_FLAT_SCR_HI flat_scratch_hi register.
- =================== ==========================================
-
-Examples:
-
-.. parsed-literal::
-
- reg = 1
- offset = 2
- size = 4
- hwreg_enc = reg | (offset << 6) | ((size - 1) << 11)
-
- s_getreg_b32 s2, 0x1881
- s_getreg_b32 s2, hwreg_enc // the same as above
- s_getreg_b32 s2, hwreg(1, 2, 4) // the same as above
- s_getreg_b32 s2, hwreg(reg, offset, size) // the same as above
-
- s_getreg_b32 s2, hwreg(15)
- s_getreg_b32 s2, hwreg(51, 1, 31)
- s_getreg_b32 s2, hwreg(HW_REG_LDS_ALLOC, 0, 1)
diff --git a/llvm/docs/AMDGPU/gfx12_imm16.rst b/llvm/docs/AMDGPU/gfx12_imm16.rst
deleted file mode 100644
index 44e6d5856a558..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_imm16.rst
+++ /dev/null
@@ -1,7 +0,0 @@
-.. _amdgpu_synid_imm16:
-
-imm16
-======
-
-An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
-
diff --git a/llvm/docs/AMDGPU/gfx12_ioffset.rst b/llvm/docs/AMDGPU/gfx12_ioffset.rst
deleted file mode 100644
index 0901b774f8144..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ioffset.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ioffset:
-
-ioffset
-=======
-
-*Size:* 1 dword.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_label.rst b/llvm/docs/AMDGPU/gfx12_label.rst
deleted file mode 100644
index bdd6e1cb1ee8d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_label.rst
+++ /dev/null
@@ -1,29 +0,0 @@
-.. _amdgpu_synid_label:
-
-label
-=====
-
-A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
-
-This operand may be specified as one of the following:
-
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
-* A :ref:`symbol<amdgpu_synid_symbol>` (for example, a label) representing a relocatable address in the same compilation unit where it is referred from. The value is handled as a 16-bit PC-relative dword offset to be resolved by a linker.
-
-Examples:
-
-.. parsed-literal::
-
- offset = 30
- label_1:
- label_2 = . + 4
-
- s_branch 32
- s_branch offset + 2
- s_branch label_1
- s_branch label_2
- s_branch label_3
- s_branch label_4
-
- label_3 = label_2 + 4
- label_4:
diff --git a/llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst b/llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst
deleted file mode 100644
index 7442c5d5c89dc..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_literal_1f74c7.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_literal_1f74c7:
-
-literal
-=======
-
-*Size:* 2 dwords.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_literal_81e671.rst b/llvm/docs/AMDGPU/gfx12_literal_81e671.rst
deleted file mode 100644
index ab1b05601ff68..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_literal_81e671.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_literal_81e671:
-
-literal
-=======
-
-*Size:* 1 dword.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_m.rst b/llvm/docs/AMDGPU/gfx12_m.rst
deleted file mode 100644
index 7cfee90bae2ce..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_m.rst
+++ /dev/null
@@ -1,13 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_m:
-
-m
-=
-
-This operand may be used with floating point operand modifiers :ref:`abs<amdgpu_synid_abs>` and :ref:`neg<amdgpu_synid_neg>`.
diff --git a/llvm/docs/AMDGPU/gfx12_operands.rst b/llvm/docs/AMDGPU/gfx12_operands.rst
new file mode 100644
index 0000000000000..dc7850293c332
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx12_operands.rst
@@ -0,0 +1,1492 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx12_addr:
+
+addr
+----
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_attr:
+
+attr
+----
+
+Interpolation attribute and channel:
+
+ ============== ===================================
+ Syntax Description
+ ============== ===================================
+ attr{0..32}.x Attribute 0..32 with *x* channel.
+ attr{0..32}.y Attribute 0..32 with *y* channel.
+ attr{0..32}.z Attribute 0..32 with *z* channel.
+ attr{0..32}.w Attribute 0..32 with *w* channel.
+ ============== ===================================
+
+Examples:
+
+.. parsed-literal::
+
+ ds_param_load v5, attr0.z
+
+.. _amdgpu_synid_gfx12_data0_6802ce:
+
+data0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data0_fd235e:
+
+data0
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data0_56f215:
+
+data0
+-----
+
+Instruction input.
+
+*Size:* 3 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data0_e016a1:
+
+data0
+-----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data1_6802ce:
+
+data1
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data1_fd235e:
+
+data1
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data1_e016a1:
+
+data1
+-----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_data1_731030:
+
+data1
+-----
+
+Instruction input.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_ioffset:
+
+ioffset
+-------
+
+*Size:* 1 dword.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_literal_81e671:
+
+literal
+-------
+
+*Size:* 1 dword.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_literal_ad4155:
+
+literal
+-------
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`simm16<amdgpu_synid_simm16>`
+
+.. _amdgpu_synid_gfx12_literal_6f0844:
+
+literal
+-------
+
+A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
+The value is converted to *f32* as described :ref:`here<amdgpu_synid_conv>`.
+
+.. _amdgpu_synid_gfx12_literal_a3e80c:
+
+literal
+-------
+
+An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value is truncated to 32 bits.
+
+.. _amdgpu_synid_gfx12_rsrc_5fe6d8:
+
+rsrc
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_rsrc_c9f929:
+
+rsrc
+----
+
+Instruction input.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_saddr_8ad588:
+
+saddr
+-----
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_saddr_6c410e:
+
+saddr
+-----
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_samp:
+
+samp
+----
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sbase_453b95:
+
+sbase
+-----
+
+A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sbase_30e75b:
+
+sbase
+-----
+
+A 64-bit base address for scalar memory operations.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_5c7b50:
+
+sdata
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_sdata_54e16e:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_d725ab:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`simm8<amdgpu_synid_simm8>`
+
+.. _amdgpu_synid_gfx12_sdata_6c003b:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 16 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_386c33:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_dd9dd8:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 3 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_4585b8:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdata_0974a4:
+
+sdata
+-----
+
+Instruction output.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdst_acfb90:
+
+sdst
+----
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
+
+.. _amdgpu_synid_gfx12_sdst_3cd7ad:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 1 dword if wavefront size is 32, otherwise 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdst_54e16e:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdst_8078f5:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`
+
+.. _amdgpu_synid_gfx12_sdst_386c33:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_sdst_ea3f10:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`
+
+.. _amdgpu_synid_gfx12_sdst_006c40:
+
+sdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`vcc<amdgpu_synid_vcc>`
+
+.. _amdgpu_synid_gfx12_simm16_81e671:
+
+simm16
+------
+
+*Size:* 1 dword.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_simm16_ad4155:
+
+simm16
+------
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`simm16<amdgpu_synid_simm16>`
+
+.. _amdgpu_synid_gfx12_simm16_8ccd1e:
+
+simm16
+------
+
+A 16-bit message code. The bits of this operand have the following meaning:
+
+ ============ =============================== ===============
+ Bits Description Value Range
+ ============ =============================== ===============
+ 3:0 Message *type*. 0..15
+ 6:4 Optional *operation*. 0..7
+ 7:7 Must be 0. 0
+ 9:8 Optional *stream*. 0..3
+ 15:10 Unused. \-
+ ============ =============================== ===============
+
+This operand may be specified as one of the following:
+
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
+* A *sendmsg* value described below.
+
+ ==================================== ====================================================
+ Sendmsg Value Syntax Description
+ ==================================== ====================================================
+ sendmsg(<*type*>) A message identified by its *type*.
+ sendmsg(<*type*>,<*op*>) A message identified by its *type* and *operation*.
+ sendmsg(<*type*>,<*op*>,<*stream*>) A message identified by its *type* and *operation*
+ with a stream *id*.
+ ==================================== ====================================================
+
+*Type* may be specified using message *name* or message *id*.
+
+*Op* may be specified using operation *name* or operation *id*.
+
+Stream *id* is an integer in the range 0..3.
+
+Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
+or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
+
+Each message type supports specific operations:
+
+ ====================== ========== ============================== ============ ==========
+ Message name Message Id Supported Operations Operation Id Stream Id
+ ====================== ========== ============================== ============ ==========
+ MSG_INTERRUPT 1 \- \- \-
+ MSG_HS_TESSFACTOR 2 \- \- \-
+ MSG_DEALLOC_VGPRS 3 \- \- \-
+ MSG_STALL_WAVE_GEN 5 \- \- \-
+ MSG_HALT_WAVES 6 \- \- \-
+ MSG_GS_ALLOC_REQ 9 \- \- \-
+ MSG_SYSMSG 15 SYSMSG_OP_ECC_ERR_INTERRUPT 1 \-
+ \ SYSMSG_OP_REG_RD 2 \-
+ \ SYSMSG_OP_TTRACE_PC 4 \-
+ ====================== ========== ============================== ============ ==========
+
+*Sendmsg* arguments are validated depending on how *type* value is specified:
+
+* If message *type* is specified by name, arguments values must satisfy limitations detailed in the table above.
+* If message *type* is specified as a number, each argument must not exceed corresponding value range (see the first table).
+
+Examples:
+
+.. parsed-literal::
+
+ // numeric message code
+ msg = 0x10
+ s_sendmsg 0x12
+ s_sendmsg msg + 2
+
+ // sendmsg with strict arguments validation
+ s_sendmsg sendmsg(MSG_INTERRUPT)
+ s_sendmsg sendmsg(MSG_SYSMSG, SYSMSG_OP_TTRACE_PC)
+
+ // sendmsg with validation of value range only
+ msg = 2
+ op = 3
+ s_sendmsg sendmsg(msg, op)
+
+.. _amdgpu_synid_gfx12_simm16_dff4f4:
+
+simm16
+------
+
+A branch target which is a 16-bit signed integer treated as a PC-relative dword offset.
+
+This operand may be specified as one of the following:
+
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..32767.
+* A :ref:`symbol<amdgpu_synid_symbol>` (for example, a label) representing a relocatable address in the same compilation unit where it is referred from. The value is handled as a 16-bit PC-relative dword offset to be resolved by a linker.
+
+Examples:
+
+.. parsed-literal::
+
+ offset = 30
+ label_1:
+ label_2 = . + 4
+
+ s_branch 32
+ s_branch offset + 2
+ s_branch label_1
+ s_branch label_2
+ s_branch label_3
+ s_branch label_4
+
+ label_3 = label_2 + 4
+ label_4:
+
+.. _amdgpu_synid_gfx12_simm16_faa0f8:
+
+simm16
+------
+
+A delay between dependent SALU/VALU instructions.
+This operand may specify a delay for 2 instructions:
+the one after the current *s_delay_alu* instruction
+and for the second instruction indicated by *SKIP*.
+
+The bits of this operand have the following meaning:
+
+ ===== ========================================================== ============
+ Bits Description Value Range
+ ===== ========================================================== ============
+ 3:0 ID0: indicates a delay for the first instruction. 0..11
+ 6:4 SKIP: indicates the position of the second instruction. 0..5
+ 10:7 ID1: indicates a delay for the second instruction. 0..11
+ ===== ========================================================== ============
+
+This operand may be specified as one of the following:
+
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
+* A combination of *instid0*, *instskip*, *instid1* values described below.
+
+ ======================== =========================== ===============
+ Syntax Description Default Value
+ ======================== =========================== ===============
+ instid0(<*ID name*>) A symbolic *ID0* value. instid0(NO_DEP)
+ instskip(<*SKIP name*>) A symbolic *SKIP* value. instskip(SAME)
+ instid1(<*ID name*>) A symbolic *ID1* value. instid1(NO_DEP)
+ ======================== =========================== ===============
+
+These values may be specified in any order.
+When more than one value is specified, the values must be separated from each other by a '|'.
+
+Valid *ID names* are defined below.
+
+ =================== ===================================================================
+ Name Description
+ =================== ===================================================================
+ NO_DEP No dependency on any prior instruction. This is the default value.
+ VALU_DEP_1 Dependency on a previous VALU instruction, 1 opcode back.
+ VALU_DEP_2 Dependency on a previous VALU instruction, 2 opcodes back.
+ VALU_DEP_3 Dependency on a previous VALU instruction, 3 opcodes back.
+ VALU_DEP_4 Dependency on a previous VALU instruction, 4 opcodes back.
+ TRANS32_DEP_1 Dependency on a previous TRANS32 instruction, 1 opcode back.
+ TRANS32_DEP_2 Dependency on a previous TRANS32 instruction, 2 opcodes back.
+ TRANS32_DEP_3 Dependency on a previous TRANS32 instruction, 3 opcodes back.
+ FMA_ACCUM_CYCLE_1 Single cycle penalty for FMA accumulation.
+ SALU_CYCLE_1 1 cycle penalty for a prior SALU instruction.
+ SALU_CYCLE_2 2 cycle penalty for a prior SALU instruction.
+ SALU_CYCLE_3 3 cycle penalty for a prior SALU instruction.
+ =================== ===================================================================
+
+Legal *SKIP names* are described in the following table.
+
+ ======== ============================================================================
+ Name Description
+ ======== ============================================================================
+ SAME Apply second dependency to the same instruction. This is the default value.
+ NEXT Apply second dependency to the next instruction.
+ SKIP_1 Skip 1 instruction then apply dependency.
+ SKIP_2 Skip 2 instructions then apply dependency.
+ SKIP_3 Skip 3 instructions then apply dependency.
+ SKIP_4 Skip 4 instructions then apply dependency.
+ ======== ============================================================================
+
+Examples:
+
+.. parsed-literal::
+
+ s_delay_alu instid0(VALU_DEP_1)
+ s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+
+.. _amdgpu_synid_gfx12_simm16_165f69:
+
+simm16
+------
+
+Bits of a hardware register being accessed.
+
+The bits of this operand have the following meaning:
+
+ ======= ===================== ============
+ Bits Description Value Range
+ ======= ===================== ============
+ 5:0 Register *id*. 0..63
+ 10:6 First bit *offset*. 0..31
+ 15:11 *Size* in bits. 1..32
+ ======= ===================== ============
+
+This operand may be specified as one of the following:
+
+* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
+* An *hwreg* value described below.
+
+ ==================================== ============================================================================
+ Hwreg Value Syntax Description
+ ==================================== ============================================================================
+ hwreg({0..63}) All bits of a register indicated by its *id*.
+ hwreg(<*name*>) All bits of a register indicated by its *name*.
+ hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by register *id*, first bit *offset* and *size*.
+ hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by register *name*, first bit *offset* and *size*.
+ ==================================== ============================================================================
+
+Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
+or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
+
+Defined register *names* include:
+
+ =================== ==========================================
+ Name Description
+ =================== ==========================================
+ HW_REG_MODE Shader writeable mode bits.
+ HW_REG_STATUS Shader read-only status.
+ HW_REG_TRAPSTS Trap status.
+ HW_REG_HW_ID1 Id of wave, simd, compute unit, etc.
+ HW_REG_HW_ID2 Id of queue, pipeline, etc.
+ HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
+ HW_REG_LDS_ALLOC Per-wave LDS allocation.
+ HW_REG_IB_STS Counters of outstanding instructions.
+ HW_REG_SH_MEM_BASES Memory aperture.
+ HW_REG_FLAT_SCR_LO flat_scratch_lo register.
+ HW_REG_FLAT_SCR_HI flat_scratch_hi register.
+ =================== ==========================================
+
+Examples:
+
+.. parsed-literal::
+
+ reg = 1
+ offset = 2
+ size = 4
+ hwreg_enc = reg | (offset << 6) | ((size - 1) << 11)
+
+ s_getreg_b32 s2, 0x1881
+ s_getreg_b32 s2, hwreg_enc // the same as above
+ s_getreg_b32 s2, hwreg(1, 2, 4) // the same as above
+ s_getreg_b32 s2, hwreg(reg, offset, size) // the same as above
+
+ s_getreg_b32 s2, hwreg(15)
+ s_getreg_b32 s2, hwreg(51, 1, 31)
+ s_getreg_b32 s2, hwreg(HW_REG_LDS_ALLOC, 0, 1)
+
+.. _amdgpu_synid_gfx12_simm16_f7832e:
+
+simm16
+------
+
+The clause operand encodes the length and break_span of the clause:
+
+* LENGTH = SIMM16[5:0]
+ This field is set to the logical number of instructions in the clause, minus 1 (e.g. if a clause has 4 instructions,
+ program this field to 3). The minimum number of instructions required for a clause is 2 and the maximum
+ number of instructions is 63, therefore this field must be programmed in the range [1, 62] inclusive.
+
+* BREAK_SPAN = SIMM16[11:8]
+ This field is set to the number of instructions to issue before each clause break. If set to zero then there are
+ no clause breaks. If set to nonzero value then the maximum number of instructions between clause breaks
+ is 15.
+
+.. _amdgpu_synid_gfx12_simm16_343e98:
+
+simm16
+------
+
+The version operand spacifies the microcode version.
+
+* SIMM16[7:0] specifies the microcode version.
+* SIMM16[15:8] must be set to zero.
+
+.. _amdgpu_synid_gfx12_soffset_422f18:
+
+soffset
+-------
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`
+
+.. _amdgpu_synid_gfx12_soffset_ab3dc3:
+
+soffset
+-------
+
+An offset added to the base address to get memory address.
+
+* If offset is specified as a register, it supplies an unsigned byte offset.
+* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`
+
+.. _amdgpu_synid_gfx12_soffset_1764b4:
+
+soffset
+-------
+
+An unsigned 20-bit offset added to the base address to get memory address.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`
+
+.. _amdgpu_synid_gfx12_src0_6802ce:
+
+src0
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src0_7987e4:
+
+src0
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src0_fd235e:
+
+src0
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src0_420095:
+
+src0
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src0_e016a1:
+
+src0
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src0_1d4114:
+
+src0
+----
+
+attr0.x through attr63.w, parameter attribute and channel to be interpolated
+
+.. _amdgpu_synid_gfx12_src1_e18ccf:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`
+
+.. _amdgpu_synid_gfx12_src1_0f3a08:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src1_6802ce:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src1_7987e4:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src1_fd235e:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src1_420095:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src1_e016a1:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src1_731030:
+
+src1
+----
+
+Instruction input.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src2_0f3a08:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src2_6802ce:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src2_7987e4:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src2_81ba27:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_src2_420095:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_src2_e016a1:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_src2_7b936a:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`fconst<amdgpu_synid_fconst>`
+
+.. _amdgpu_synid_gfx12_src2_96fbd3:
+
+src2
+----
+
+Instruction input.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`fconst<amdgpu_synid_fconst>`
+
+.. _amdgpu_synid_gfx12_srcx0:
+
+srcx0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_srcy0:
+
+srcy0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_ssrc0_19fcd2:
+
+ssrc0
+-----
+
+.. _amdgpu_synid_sendmsg_rtn:
+
+sendmsg_rtn
+===========
+
+An 8-bit value in the instruction to encode the message type.
+
+This operand may be specified as one of the following:
+
+ * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
+ * A *sendmsg* value described below.
+
+ ==================================== ====================================================
+ Sendmsg Value Syntax Description
+ ==================================== ====================================================
+ sendmsg(MSG_RTN_GET_DOORBELL) Get doorbell ID.
+ sendmsg(MSG_RTN_GET_DDID) Get Draw/Dispatch ID.
+ sendmsg(MSG_RTN_GET_TMA) Get TMA value.
+ sendmsg(MSG_RTN_GET_TBA) Get TBA value.
+ sendmsg(MSG_RTN_GET_REALTIME) Get REALTIME value.
+ sendmsg(MSG_RTN_SAVE_WAVE) Report that this wave is ready to be context-saved.
+ ==================================== ====================================================
+
+Examples:
+
+.. parsed-literal::
+
+ s_sendmsg_rtn_b32 s0, 132
+ s_sendmsg_rtn_b32 s0, sendmsg(MSG_GET_REALTIME)
+
+.. _amdgpu_synid_gfx12_ssrc0_1a9ca5:
+
+ssrc0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`m0<amdgpu_synid_m0>`
+
+.. _amdgpu_synid_gfx12_ssrc0_6fbc49:
+
+ssrc0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_ssrc0_0f3a08:
+
+ssrc0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_ssrc0_81ba27:
+
+ssrc0
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_ssrc0_dfa11e:
+
+ssrc0
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_ssrc1_0f3a08:
+
+ssrc1
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_ssrc1_dfa11e:
+
+ssrc1
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
+
+.. _amdgpu_synid_gfx12_tgt:
+
+tgt
+---
+
+Instruction output.
+
+*Size:* 4 dwords.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_vaddr_c8b8d4:
+
+vaddr
+-----
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vaddr_a972b9:
+
+vaddr
+-----
+
+*Size:* 11 dwords.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_vaddr_c12f43:
+
+vaddr
+-----
+
+*Size:* 12 dwords.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_vaddr_f2b449:
+
+vaddr
+-----
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vaddr_d82160:
+
+vaddr
+-----
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vcc:
+
+vcc
+---
+
+Vector condition code. This operand depends on wavefront size:
+
+* Should be :ref:`vcc_lo<amdgpu_synid_vcc_lo>` if wavefront size is 32.
+* Should be :ref:`vcc<amdgpu_synid_vcc>` if wavefront size is 64.
+
+.. _amdgpu_synid_gfx12_vdata_89680f:
+
+vdata
+-----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdata_aac3e8:
+
+vdata
+-----
+
+Instruction output.
+
+*Size:* 10 dwords.
+
+*Operands:*
+
+.. _amdgpu_synid_gfx12_vdata_bdb32f:
+
+vdata
+-----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdata_48e42f:
+
+vdata
+-----
+
+Instruction output.
+
+*Size:* 3 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdata_69a144:
+
+vdata
+-----
+
+Instruction output.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_54e16e:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
+
+.. _amdgpu_synid_gfx12_vdst_89680f:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_7de8e7:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`exec<amdgpu_synid_exec>`
+
+.. _amdgpu_synid_gfx12_vdst_bdb32f:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_006c40:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`vcc<amdgpu_synid_vcc>`
+
+.. _amdgpu_synid_gfx12_vdst_48e42f:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 3 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_2eda77:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 32 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_227281:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 4 dwords if wavefront size is 64, otherwise 8 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_69a144:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdst_47d3bc:
+
+vdst
+----
+
+Instruction output.
+
+*Size:* 8 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdstx:
+
+vdstx
+-----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vdsty:
+
+vdsty
+-----
+
+Instruction output.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc_6802ce:
+
+vsrc
+----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc_fd235e:
+
+vsrc
+----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc_56f215:
+
+vsrc
+----
+
+Instruction input.
+
+*Size:* 3 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc_89fd7b:
+
+vsrc
+----
+
+Instruction input.
+
+*Size:* 32 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc_e016a1:
+
+vsrc
+----
+
+Instruction input.
+
+*Size:* 4 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc0:
+
+vsrc0
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc1_6802ce:
+
+vsrc1
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc1_fd235e:
+
+vsrc1
+-----
+
+Instruction input.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc2:
+
+vsrc2
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrc3:
+
+vsrc3
+-----
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrcx1:
+
+vsrcx1
+------
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
+.. _amdgpu_synid_gfx12_vsrcy1:
+
+vsrcy1
+------
+
+Instruction input.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
+
diff --git a/llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst b/llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst
deleted file mode 100644
index d1a475f205329..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_rsrc_5fe6d8.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_rsrc_5fe6d8:
-
-rsrc
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst b/llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst
deleted file mode 100644
index 180ae068d2ceb..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_rsrc_c9f929.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_rsrc_c9f929:
-
-rsrc
-====
-
-Instruction input.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst b/llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst
deleted file mode 100644
index 4b3511fc76671..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_saddr_cdc95c.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_saddr_cdc95c:
-
-saddr
-=====
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst b/llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst
deleted file mode 100644
index d3de11dfaade8..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_saddr_d42b64.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_saddr_d42b64:
-
-saddr
-=====
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_samp.rst b/llvm/docs/AMDGPU/gfx12_samp.rst
deleted file mode 100644
index 2bb15e58db5fe..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_samp.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_samp:
-
-samp
-====
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sbase_453b95.rst b/llvm/docs/AMDGPU/gfx12_sbase_453b95.rst
deleted file mode 100644
index 54c2deed4e5f1..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sbase_453b95.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sbase_453b95:
-
-sbase
-=====
-
-A 128-bit buffer resource constant for scalar memory operations which provides a base address, a size and a stride.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst b/llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst
deleted file mode 100644
index 2308b3d44585c..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sbase_47adb7.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sbase_47adb7:
-
-sbase
-=====
-
-A 64-bit base address for scalar memory operations.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst b/llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst
deleted file mode 100644
index d498f8c705210..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_0974a4.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_0974a4:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_354189.rst b/llvm/docs/AMDGPU/gfx12_sdata_354189.rst
deleted file mode 100644
index c50665474c461..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_354189.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_354189:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst b/llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst
deleted file mode 100644
index 42f66f33e6ad4..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_4585b8.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_4585b8:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst b/llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst
deleted file mode 100644
index 028461a4a07da..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_5c7b50.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_5c7b50:
-
-sdata
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst b/llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst
deleted file mode 100644
index 87e19a95f2b8b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_6c003b.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_6c003b:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 16 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_836716.rst b/llvm/docs/AMDGPU/gfx12_sdata_836716.rst
deleted file mode 100644
index be1bce94e7062..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_836716.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_836716:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst b/llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst
deleted file mode 100644
index c882df8dad6c1..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_d725ab.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_d725ab:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`simm8<amdgpu_synid_simm8>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst b/llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst
deleted file mode 100644
index 64658894fee95..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdata_dd9dd8.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdata_dd9dd8:
-
-sdata
-=====
-
-Instruction output.
-
-*Size:* 3 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_006c40.rst b/llvm/docs/AMDGPU/gfx12_sdst_006c40.rst
deleted file mode 100644
index f269b05c65edc..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_006c40.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_006c40:
-
-sdst
-====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`vcc<amdgpu_synid_vcc>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_20064d.rst b/llvm/docs/AMDGPU/gfx12_sdst_20064d.rst
deleted file mode 100644
index 83c11a2e03eae..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_20064d.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_20064d:
-
-sdst
-====
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_354189.rst b/llvm/docs/AMDGPU/gfx12_sdst_354189.rst
deleted file mode 100644
index 8433406a20591..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_354189.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_354189:
-
-sdst
-====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_836716.rst b/llvm/docs/AMDGPU/gfx12_sdst_836716.rst
deleted file mode 100644
index abce5696f6716..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_836716.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_836716:
-
-sdst
-====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst b/llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst
deleted file mode 100644
index e0072d90a4cfd..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_ced58d.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_ced58d:
-
-sdst
-====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst b/llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst
deleted file mode 100644
index 33e8c376af67f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sdst_e701cc.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_sdst_e701cc:
-
-sdst
-====
-
-Instruction output.
-
-*Size:* 1 dword if wavefront size is 32, otherwise 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_sendmsg.rst b/llvm/docs/AMDGPU/gfx12_sendmsg.rst
deleted file mode 100644
index cb51be04555fe..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sendmsg.rst
+++ /dev/null
@@ -1,48 +0,0 @@
-.. _amdgpu_synid_sendmsg:
-
-sendmsg
-=======
-
-An 8-bit value in simm16[7:0] encodes the message type.
-
-This operand may be specified as one of the following:
-
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* A *sendmsg* value described below.
-
-
- ==================================== ====================================================
- Sendmsg Value Syntax Description
- ==================================== ====================================================
- sendmsg(<*type*>) A message identified by its *type*.
- ==================================== ====================================================
-
-*Type* may be specified using message *name* or message *id*.
-
-Numeric values may be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`
-or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
-
-
-Only the following message types are valid.
-
- ====================== ===========
- Message type simm16[7:0]
- ====================== ===========
- Reserved 0
- MSG_INTERRUPT 1
- MSG_HS_TESSFACTOR 2
- MSG_DEALLOC_VGPRS 3
- MSG_GS_ALLOC_REQ 9
- ====================== ===========
-
-Examples:
-
-.. parsed-literal::
-
- // numeric message code
- msg = 0x1
- s_sendmsg 0x3
- s_sendmsg msg + 2
-
- // sendmsg with strict arguments validation
- s_sendmsg sendmsg(MSG_INTERRUPT)
diff --git a/llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst b/llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst
deleted file mode 100644
index ebb591dc101e7..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_sendmsg_rtn.rst
+++ /dev/null
@@ -1,30 +0,0 @@
-.. _amdgpu_synid_sendmsg_rtn:
-
-sendmsg_rtn
-===========
-
-An 8-bit value in the instruction to encode the message type.
-
-This operand may be specified as one of the following:
-
- * An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
- * A *sendmsg* value described below.
-
- ==================================== ====================================================
- Sendmsg Value Syntax Description
- ==================================== ====================================================
- sendmsg(MSG_RTN_GET_DOORBELL) Get doorbell ID.
- sendmsg(MSG_RTN_GET_DDID) Get Draw/Dispatch ID.
- sendmsg(MSG_RTN_GET_TMA) Get TMA value.
- sendmsg(MSG_RTN_GET_TBA) Get TBA value.
- sendmsg(MSG_RTN_GET_REALTIME) Get REALTIME value.
- sendmsg(MSG_RTN_SAVE_WAVE) Report that this wave is ready to be context-saved.
- ==================================== ====================================================
-
-Examples:
-
-.. parsed-literal::
-
- s_sendmsg_rtn_b32 s0, 132
- s_sendmsg_rtn_b32 s0, sendmsg(MSG_GET_REALTIME)
-
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst b/llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst
deleted file mode 100644
index 0cb123393a309..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_15ccdd.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_15ccdd:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`version<amdgpu_synid_version>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_218bea.rst b/llvm/docs/AMDGPU/gfx12_simm16_218bea.rst
deleted file mode 100644
index e08605e0bfbfb..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_218bea.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_218bea:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`waitcnt<amdgpu_synid_waitcnt>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_39b593.rst b/llvm/docs/AMDGPU/gfx12_simm16_39b593.rst
deleted file mode 100644
index babb4b689a519..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_39b593.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_39b593:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`imm16<amdgpu_synid_imm16>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst b/llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst
deleted file mode 100644
index cc8dbc6742803..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_3d2a4f.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_3d2a4f:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`label<amdgpu_synid_label>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_730a13.rst b/llvm/docs/AMDGPU/gfx12_simm16_730a13.rst
deleted file mode 100644
index 93596db9287be..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_730a13.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_730a13:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`clause<amdgpu_synid_clause>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst b/llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst
deleted file mode 100644
index fc63930c30334..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_7ed651.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_7ed651:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`hwreg<amdgpu_synid_hwreg>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_81e671.rst b/llvm/docs/AMDGPU/gfx12_simm16_81e671.rst
deleted file mode 100644
index 16dcf397b48cf..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_81e671.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_81e671:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_c98889.rst b/llvm/docs/AMDGPU/gfx12_simm16_c98889.rst
deleted file mode 100644
index 03e007af73690..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_c98889.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_c98889:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`delay<amdgpu_synid_delay>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst b/llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst
deleted file mode 100644
index e53f8125c3398..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_cc1716.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_cc1716:
-
-simm16
-======
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`hwreg<amdgpu_synid_hwreg>`
diff --git a/llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst b/llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst
deleted file mode 100644
index 9bdac9b6056e7..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_simm16_ee8b30.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_simm16_ee8b30:
-
-simm16
-======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`sendmsg<amdgpu_synid_sendmsg>`
diff --git a/llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst b/llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst
deleted file mode 100644
index 44de0304b46cf..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_soffset_8ec073.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_soffset_8ec073:
-
-soffset
-=======
-
-An unsigned 20-bit offset added to the base address to get memory address.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst b/llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst
deleted file mode 100644
index d115150d11d71..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_soffset_c5b88c.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_soffset_c5b88c:
-
-soffset
-=======
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst b/llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst
deleted file mode 100644
index bd571b6499603..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_soffset_ec005a.rst
+++ /dev/null
@@ -1,20 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_soffset_ec005a:
-
-soffset
-=======
-
-An offset added to the base address to get memory address.
-
-* If offset is specified as a register, it supplies an unsigned byte offset.
-* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_5727cf.rst b/llvm/docs/AMDGPU/gfx12_src0_5727cf.rst
deleted file mode 100644
index 15fde5c33daab..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_5727cf.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_5727cf:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_5cae62.rst b/llvm/docs/AMDGPU/gfx12_src0_5cae62.rst
deleted file mode 100644
index fa02f046b1804..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_5cae62.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_5cae62:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_6802ce.rst b/llvm/docs/AMDGPU/gfx12_src0_6802ce.rst
deleted file mode 100644
index e17a719c8b02c..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_6802ce:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_85aab6.rst b/llvm/docs/AMDGPU/gfx12_src0_85aab6.rst
deleted file mode 100644
index effa6f69c6acb..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_85aab6.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_85aab6:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_c4593f.rst b/llvm/docs/AMDGPU/gfx12_src0_c4593f.rst
deleted file mode 100644
index bbe6191f49944..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_c4593f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_c4593f:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_e016a1.rst b/llvm/docs/AMDGPU/gfx12_src0_e016a1.rst
deleted file mode 100644
index c2d23d737610d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_e016a1:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src0_fd235e.rst b/llvm/docs/AMDGPU/gfx12_src0_fd235e.rst
deleted file mode 100644
index dc048af280704..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src0_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src0_fd235e:
-
-src0
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_5727cf.rst b/llvm/docs/AMDGPU/gfx12_src1_5727cf.rst
deleted file mode 100644
index d1d08370eab76..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_5727cf.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_5727cf:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_5cae62.rst b/llvm/docs/AMDGPU/gfx12_src1_5cae62.rst
deleted file mode 100644
index 3ad591ce779a7..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_5cae62.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_5cae62:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_6802ce.rst b/llvm/docs/AMDGPU/gfx12_src1_6802ce.rst
deleted file mode 100644
index 84ff631fc275d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_6802ce:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_731030.rst b/llvm/docs/AMDGPU/gfx12_src1_731030.rst
deleted file mode 100644
index 8c67699145a1f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_731030.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_731030:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_977794.rst b/llvm/docs/AMDGPU/gfx12_src1_977794.rst
deleted file mode 100644
index 765134002d94b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_977794.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_977794:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_c4593f.rst b/llvm/docs/AMDGPU/gfx12_src1_c4593f.rst
deleted file mode 100644
index aba4da84faee5..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_c4593f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_c4593f:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_e016a1.rst b/llvm/docs/AMDGPU/gfx12_src1_e016a1.rst
deleted file mode 100644
index 438585390ec88..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_e016a1:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src1_fd235e.rst b/llvm/docs/AMDGPU/gfx12_src1_fd235e.rst
deleted file mode 100644
index 5863e93170ef6..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src1_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src1_fd235e:
-
-src1
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_2797bc.rst b/llvm/docs/AMDGPU/gfx12_src2_2797bc.rst
deleted file mode 100644
index b393e2ac36b96..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_2797bc.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_2797bc:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_5727cf.rst b/llvm/docs/AMDGPU/gfx12_src2_5727cf.rst
deleted file mode 100644
index 9ffaa079f6b91..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_5727cf.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_5727cf:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_5cae62.rst b/llvm/docs/AMDGPU/gfx12_src2_5cae62.rst
deleted file mode 100644
index 46d65cb3bad5b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_5cae62.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_5cae62:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_6802ce.rst b/llvm/docs/AMDGPU/gfx12_src2_6802ce.rst
deleted file mode 100644
index 0ad2ede9df4ac..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_6802ce:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_7b936a.rst b/llvm/docs/AMDGPU/gfx12_src2_7b936a.rst
deleted file mode 100644
index 9f1ea3c3ab944..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_7b936a.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_7b936a:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`fconst<amdgpu_synid_fconst>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst b/llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst
deleted file mode 100644
index 884d089d544c2..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_96fbd3.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_96fbd3:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`fconst<amdgpu_synid_fconst>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_c4593f.rst b/llvm/docs/AMDGPU/gfx12_src2_c4593f.rst
deleted file mode 100644
index 849230b5a56a2..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_c4593f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_c4593f:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_src2_e016a1.rst b/llvm/docs/AMDGPU/gfx12_src2_e016a1.rst
deleted file mode 100644
index 266c4eaedf72d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_src2_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_src2_e016a1:
-
-src2
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_srcx0.rst b/llvm/docs/AMDGPU/gfx12_srcx0.rst
deleted file mode 100644
index 57b05a18c3100..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_srcx0.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_srcx0:
-
-srcx0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_srcy0.rst b/llvm/docs/AMDGPU/gfx12_srcy0.rst
deleted file mode 100644
index 350b7428668ba..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_srcy0.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_srcy0:
-
-srcy0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst
deleted file mode 100644
index c3f33e4f78fdd..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_007f9c.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_007f9c:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst
deleted file mode 100644
index 5aa3f2d3585ac..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_1a9ca5.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_1a9ca5:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`m0<amdgpu_synid_m0>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst
deleted file mode 100644
index 36925daf7a86c..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_245536.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_245536:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`sendmsg_rtn<amdgpu_synid_sendmsg_rtn>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst
deleted file mode 100644
index 4eae7050ea714..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_2797bc.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_2797bc:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst
deleted file mode 100644
index a29f83d36d48f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_bbb4c6.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_bbb4c6:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst b/llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst
deleted file mode 100644
index 33ca4d608d7df..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc0_c4593f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc0_c4593f:
-
-ssrc0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst b/llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst
deleted file mode 100644
index 1f3ea343f3a09..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc1_bbb4c6.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc1_bbb4c6:
-
-ssrc1
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`
diff --git a/llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst b/llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst
deleted file mode 100644
index f81d0f203f07b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_ssrc1_c4593f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_ssrc1_c4593f:
-
-ssrc1
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`fconst<amdgpu_synid_fconst>`, :ref:`literal<amdgpu_synid_literal>`, :ref:`exec_hi<amdgpu_synid_exec_hi>`, :ref:`exec_lo<amdgpu_synid_exec_lo>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_tgt.rst b/llvm/docs/AMDGPU/gfx12_tgt.rst
deleted file mode 100644
index 83a25aa466bfb..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_tgt.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_tgt:
-
-tgt
-===
-
-Instruction output.
-
-*Size:* 4 dwords.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst b/llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst
deleted file mode 100644
index 223b50d6ef205..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vaddr_a972b9.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vaddr_a972b9:
-
-vaddr
-=====
-
-*Size:* 11 dwords.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst b/llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst
deleted file mode 100644
index 5a93efec9f86a..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vaddr_c12f43.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vaddr_c12f43:
-
-vaddr
-=====
-
-*Size:* 12 dwords.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst b/llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst
deleted file mode 100644
index 1998e1ddc9504..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vaddr_c8b8d4.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vaddr_c8b8d4:
-
-vaddr
-=====
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst b/llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst
deleted file mode 100644
index 92d09a2399a2f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vaddr_d82160.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vaddr_d82160:
-
-vaddr
-=====
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst b/llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst
deleted file mode 100644
index 10d7e0ad1fce4..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vaddr_f2b449.rst
+++ /dev/null
@@ -1,15 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vaddr_f2b449:
-
-vaddr
-=====
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vcc.rst b/llvm/docs/AMDGPU/gfx12_vcc.rst
deleted file mode 100644
index e8509ff50a32f..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vcc.rst
+++ /dev/null
@@ -1,16 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vcc:
-
-vcc
-===
-
-Vector condition code. This operand depends on wavefront size:
-
-* Should be :ref:`vcc_lo<amdgpu_synid_vcc_lo>` if wavefront size is 32.
-* Should be :ref:`vcc<amdgpu_synid_vcc>` if wavefront size is 64.
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst b/llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst
deleted file mode 100644
index 839ec86ce2634..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_2eda77.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_2eda77:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 32 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst b/llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst
deleted file mode 100644
index d2ab49a951684..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_48e42f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_48e42f:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 3 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_69a144.rst b/llvm/docs/AMDGPU/gfx12_vdata_69a144.rst
deleted file mode 100644
index 22ac087b51e8e..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_69a144.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_69a144:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_89680f.rst b/llvm/docs/AMDGPU/gfx12_vdata_89680f.rst
deleted file mode 100644
index 5f4f4782e410d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_89680f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_89680f:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst b/llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst
deleted file mode 100644
index 2e285ef86eebc..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_aac3e8.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_aac3e8:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 10 dwords.
-
-*Operands:*
diff --git a/llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst b/llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst
deleted file mode 100644
index 109c7672541a5..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdata_bdb32f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdata_bdb32f:
-
-vdata
-=====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_006c40.rst b/llvm/docs/AMDGPU/gfx12_vdst_006c40.rst
deleted file mode 100644
index dc3ac95500037..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_006c40.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_006c40:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`vcc<amdgpu_synid_vcc>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_227281.rst b/llvm/docs/AMDGPU/gfx12_vdst_227281.rst
deleted file mode 100644
index 13fd9513245dd..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_227281.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_227281:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 4 dwords if wavefront size is 64, otherwise 8 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst b/llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst
deleted file mode 100644
index 9372e484cf5d9..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_2eda77.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_2eda77:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 32 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst b/llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst
deleted file mode 100644
index 056fe3f197417..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_47d3bc.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_47d3bc:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 8 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst b/llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst
deleted file mode 100644
index 84ab35b36b7b3..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_48e42f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_48e42f:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 3 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_69a144.rst b/llvm/docs/AMDGPU/gfx12_vdst_69a144.rst
deleted file mode 100644
index 70873ff9502b8..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_69a144.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_69a144:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst b/llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst
deleted file mode 100644
index 7248ea9449236..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_7de8e7.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_7de8e7:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`exec<amdgpu_synid_exec>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_836716.rst b/llvm/docs/AMDGPU/gfx12_vdst_836716.rst
deleted file mode 100644
index 1cd43ee9f620a..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_836716.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_836716:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`vcc_hi<amdgpu_synid_vcc_hi>`, :ref:`vcc_lo<amdgpu_synid_vcc_lo>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_89680f.rst b/llvm/docs/AMDGPU/gfx12_vdst_89680f.rst
deleted file mode 100644
index b4f055cc1574d..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_89680f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_89680f:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst b/llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst
deleted file mode 100644
index e2a4a47987b7c..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdst_bdb32f.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdst_bdb32f:
-
-vdst
-====
-
-Instruction output.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdstx.rst b/llvm/docs/AMDGPU/gfx12_vdstx.rst
deleted file mode 100644
index 4b95d4d0d84ba..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdstx.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdstx:
-
-vdstx
-=====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vdsty.rst b/llvm/docs/AMDGPU/gfx12_vdsty.rst
deleted file mode 100644
index cf0b4641308be..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vdsty.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vdsty:
-
-vdsty
-=====
-
-Instruction output.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_version.rst b/llvm/docs/AMDGPU/gfx12_version.rst
deleted file mode 100644
index 4e490ca4954a9..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_version.rst
+++ /dev/null
@@ -1,7 +0,0 @@
-.. _amdgpu_synid_version:
-
-version
-=======
-
-Microcode version header.
-
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc0.rst b/llvm/docs/AMDGPU/gfx12_vsrc0.rst
deleted file mode 100644
index fb381690c3692..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc0.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc0:
-
-vsrc0
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst b/llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst
deleted file mode 100644
index 449054574be9b..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc1_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc1_6802ce:
-
-vsrc1
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst b/llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst
deleted file mode 100644
index d6567c2fd9cef..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc1_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc1_fd235e:
-
-vsrc1
-=====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc2.rst b/llvm/docs/AMDGPU/gfx12_vsrc2.rst
deleted file mode 100644
index fe20832437431..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc2.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc2:
-
-vsrc2
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc3.rst b/llvm/docs/AMDGPU/gfx12_vsrc3.rst
deleted file mode 100644
index 18df9e4418f0e..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc3.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc3:
-
-vsrc3
-=====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst b/llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst
deleted file mode 100644
index 166da38acb079..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc_56f215.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc_56f215:
-
-vsrc
-====
-
-Instruction input.
-
-*Size:* 3 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst b/llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst
deleted file mode 100644
index e879c2bad2038..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc_6802ce.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc_6802ce:
-
-vsrc
-====
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst b/llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst
deleted file mode 100644
index c521e7261c59e..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc_89fd7b.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc_89fd7b:
-
-vsrc
-====
-
-Instruction input.
-
-*Size:* 32 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst b/llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst
deleted file mode 100644
index 84eb2eda944b7..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc_e016a1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc_e016a1:
-
-vsrc
-====
-
-Instruction input.
-
-*Size:* 4 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst b/llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst
deleted file mode 100644
index 640a235730f93..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrc_fd235e.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrc_fd235e:
-
-vsrc
-====
-
-Instruction input.
-
-*Size:* 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrcx1.rst b/llvm/docs/AMDGPU/gfx12_vsrcx1.rst
deleted file mode 100644
index 9dab58c459b2e..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrcx1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrcx1:
-
-vsrcx1
-======
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_vsrcy1.rst b/llvm/docs/AMDGPU/gfx12_vsrcy1.rst
deleted file mode 100644
index 496b2d66d2ff5..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_vsrcy1.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx12_vsrcy1:
-
-vsrcy1
-======
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx12_waitcnt.rst b/llvm/docs/AMDGPU/gfx12_waitcnt.rst
deleted file mode 100644
index 454122212f64e..0000000000000
--- a/llvm/docs/AMDGPU/gfx12_waitcnt.rst
+++ /dev/null
@@ -1,55 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_waitcnt:
-
-waitcnt
-=======
-
-Counts of outstanding instructions to wait for.
-
-The bits of this operand have the following meaning:
-
- ===== ================================================ ============
- Bits Description Value Range
- ===== ================================================ ============
- 2:0 EXP_CNT: export and LDSDIR count. 0..7
- 3:3 Unused \-
- 9:4 LGKM_CNT: LDS, GDS, Constant and Message count. 0..63
- 15:10 VM_CNT: vector memory operations count. 0..63
- ===== ================================================ ============
-
-This operand may be specified as one of the following:
-
-* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range 0..0xFFFF.
-* A combination of *vmcnt*, *expcnt*, *lgkmcnt* and other values described below.
-
- ====================== ======================================================================
- Syntax Description
- ====================== ======================================================================
- vmcnt(<*N*>) A VM_CNT value. *N* must not exceed the largest VM_CNT value.
- expcnt(<*N*>) An EXP_CNT value. *N* must not exceed the largest EXP_CNT value.
- lgkmcnt(<*N*>) An LGKM_CNT value. *N* must not exceed the largest LGKM_CNT value.
- vmcnt_sat(<*N*>) A VM_CNT value computed as min(*N*, the largest VM_CNT value).
- expcnt_sat(<*N*>) An EXP_CNT value computed as min(*N*, the largest EXP_CNT value).
- lgkmcnt_sat(<*N*>) An LGKM_CNT value computed as min(*N*, the largest LGKM_CNT value).
- ====================== ======================================================================
-
-These values may be specified in any order. Spaces, ampersands and commas may be used as optional separators.
-
-*N* is either an
-:ref:`integer number<amdgpu_synid_integer_number>` or an
-:ref:`absolute expression<amdgpu_synid_absolute_expression>`.
-
-Examples:
-
-.. parsed-literal::
-
- s_waitcnt vmcnt(1)
- s_waitcnt expcnt(2) lgkmcnt(3)
- s_waitcnt vmcnt(1), expcnt(2), lgkmcnt(3)
- s_waitcnt vmcnt(1) & lgkmcnt_sat(100) & expcnt(2)
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