[llvm] [AArch64] Address issue reported in PR#196029 (PR #199122)

[Paul Walker via llvm-commits]

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@@ -1762,9 +1762,13 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     }
 
     // SVE supports truncating stores of 64 and 128-bit vectors
+    auto VT = MVT::v2i64;
+    if (useSVEForFixedLengthVectorVT(
+            VT, /*OverrideNEON=*/Subtarget->useSVEForFixedLengthVectors()))
+      setTruncStoreAction(VT, MVT::v2i32, Custom);
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paulwalker-arm wrote:

I'm not really following the logic.  The reason for guarding the custom lowering is because when SVE is not available the code generation is improved without it.  My point is that for 64-bit vectors I would not expect SVE to be able to improve on the code quality anyway and thus there is no reason to ever custom lower it.

To further this point. If I remove the above code I see no test changes?

https://github.com/llvm/llvm-project/pull/199122