[llvm] [AMDGPU] Reject named single register inline asm constraints for wider types (PR #200771)

[Arseniy Obolenskiy via llvm-commits]

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@@ -53,7 +53,6 @@ define i64 @return_type_is_too_big_scalar() {
   ; CHECK-NEXT:   successors: %bb.1(0x80000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1 (%ir-block.0):
-  ; CHECK-NEXT:   INLINEASM &"; def $0", sideeffect attdialect, regdef, implicit-def $vgpr8
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aobolensk wrote:

They are not really lost, they are the part of the same picture. They are not being generated after my patch, because the type is too big

https://github.com/llvm/llvm-project/pull/200771