[llvm] [ISel] Introduce `llvm.pext` and `llvm.pdep` intrinsics (PR #200570)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 1 23:00:44 PDT 2026


================
@@ -8629,6 +8642,36 @@ SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
     return LowerPARTIAL_REDUCE_MLA(Op, DAG);
   case ISD::CLMUL:
     return LowerCLMUL(Op, DAG);
+  case ISD::PEXT:
+  case ISD::PDEP: {
+    // Lower generic PEXT/PDEP to SVE2 intrinsics.
+    SDLoc DL(Op);
+    EVT VT = Op.getValueType();
+    unsigned IntrID = Op.getOpcode() == ISD::PEXT
+                          ? Intrinsic::aarch64_sve_bext_x
+                          : Intrinsic::aarch64_sve_bdep_x;
+
+    if (VT.isScalarInteger()) {
+      assert((VT == MVT::i32 || VT == MVT::i64) && "Unexpected scalar type");
+      EVT NeonVT = VT == MVT::i64 ? MVT::v2i64 : MVT::v4i32;
+      EVT SveVT = VT == MVT::i64 ? MVT::nxv2i64 : MVT::nxv4i32;
+      auto ToScalable = [&](SDValue X) {
+        SDValue V = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, NeonVT, X);
+        return DAG.getInsertSubvector(DL, DAG.getUNDEF(SveVT), V, 0);
+      };
+      SDValue Z0 = ToScalable(Op.getOperand(0));
+      SDValue Z1 = ToScalable(Op.getOperand(1));
+      SDValue R =
+          DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, SveVT,
+                      DAG.getTargetConstant(IntrID, DL, MVT::i32), Z0, Z1);
+      SDValue Fixed = DAG.getExtractSubvector(DL, NeonVT, R, 0);
+      return DAG.getExtractVectorElt(DL, VT, Fixed, 0);
----------------
topperc wrote:

Can we extract directly from the intrinsic result without going through Neon?

https://github.com/llvm/llvm-project/pull/200570


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