[llvm] [X86] Add encoding support for indirect branch history fence (PR #200918)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: Mahesh-Attarde (mahesh-attarde)

<details>
<summary>Changes</summary>

This patch introduces ISA under BHI_CTRL CPUID.
The following tech paper is published in May, 2025:

[intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html#ibhf](https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html#ibhf)

As shown in the paper, The encoding is F3 48 0F 1E F8.
It does not need c-intrinsic.

---
Full diff: https://github.com/llvm/llvm-project/pull/200918.diff


3 Files Affected:

- (modified) llvm/lib/Target/X86/X86InstrSystem.td (+7) 
- (added) llvm/test/MC/Disassembler/X86/ibhf-64.txt (+5) 
- (added) llvm/test/MC/X86/ibhf-64.s (+5) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td
index fdf576baba02d..7335846cff258 100644
--- a/llvm/lib/Target/X86/X86InstrSystem.td
+++ b/llvm/lib/Target/X86/X86InstrSystem.td
@@ -606,6 +606,13 @@ let SchedRW = [WriteSystem] in {
     def ENDBR32 : I<0x1E, MRM_FB, (outs), (ins), "endbr32", []>, TB, XS;
 } // SchedRW
 
+//===----------------------------------------------------------------------===//
+// Indirect Branch History Fence
+let SchedRW = [WriteFence] in {
+  def IBHFENCE : RI<0x1E, MRM_F8, (outs), (ins), "ibhf", []>, TB, XS,
+                   Requires<[In64BitMode]>; 
+}
+
 //===----------------------------------------------------------------------===//
 // XSAVE instructions
 let SchedRW = [WriteSystem] in {
diff --git a/llvm/test/MC/Disassembler/X86/ibhf-64.txt b/llvm/test/MC/Disassembler/X86/ibhf-64.txt
new file mode 100644
index 0000000000000..a337793abbecf
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/ibhf-64.txt
@@ -0,0 +1,5 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s 
+
+# IBHF - Indirect Branch History Fence
+# CHECK: ibhf
+0xf3 0x48 0x0f 0x1e 0xf8
diff --git a/llvm/test/MC/X86/ibhf-64.s b/llvm/test/MC/X86/ibhf-64.s
new file mode 100644
index 0000000000000..1b38f60991da4
--- /dev/null
+++ b/llvm/test/MC/X86/ibhf-64.s
@@ -0,0 +1,5 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s 
+
+// CHECK: ibhf
+// CHECK: encoding: [0xf3,0x48,0x0f,0x1e,0xf8]
+ibhf
\ No newline at end of file

``````````

</details>


https://github.com/llvm/llvm-project/pull/200918