[llvm] 0b411ba - [X86] lowerShuffleAsBitBlend - use getConstVector to create selection mask (#200877)

via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 1 11:50:17 PDT 2026


Author: Simon Pilgrim
Date: 2026-06-01T18:50:11Z
New Revision: 0b411ba0a26b82e301453a67ca44a5c986aa0bdc

URL: https://github.com/llvm/llvm-project/commit/0b411ba0a26b82e301453a67ca44a5c986aa0bdc
DIFF: https://github.com/llvm/llvm-project/commit/0b411ba0a26b82e301453a67ca44a5c986aa0bdc.diff

LOG: [X86] lowerShuffleAsBitBlend - use getConstVector to create selection mask (#200877)

Avoids wasteful SDValue creation if the shuffle matching fails, handles
any i64 legalisation and makes it easier to add UNDEF element handling
in the future.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9ae9f5c5fb7ba..e9bc29721163a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -11692,17 +11692,16 @@ static SDValue lowerShuffleAsBitBlend(const SDLoc &DL, MVT VT, SDValue V1,
                                       SDValue V2, ArrayRef<int> Mask,
                                       SelectionDAG &DAG) {
   assert(VT.isInteger() && "Only supports integer vector types!");
-  MVT EltVT = VT.getVectorElementType();
-  SDValue Zero = DAG.getConstant(0, DL, EltVT);
-  SDValue AllOnes = DAG.getAllOnesConstant(DL, EltVT);
-  SmallVector<SDValue, 16> MaskOps;
+  unsigned EltSizeInBIts = VT.getScalarSizeInBits();
+  APInt Zero = APInt::getZero(EltSizeInBIts);
+  APInt AllOnes = APInt::getAllOnes(EltSizeInBIts);
+  SmallVector<APInt, 16> MaskOps;
   for (int i = 0, Size = Mask.size(); i < Size; ++i) {
     if (Mask[i] >= 0 && Mask[i] != i && Mask[i] != i + Size)
       return SDValue(); // Shuffled input!
     MaskOps.push_back(Mask[i] < Size ? AllOnes : Zero);
   }
-
-  SDValue V1Mask = DAG.getBuildVector(VT, DL, MaskOps);
+  SDValue V1Mask = getConstVector(MaskOps, VT, DAG, DL);
   return getBitSelect(DL, VT, V1, V2, V1Mask, DAG);
 }
 


        


More information about the llvm-commits mailing list