[llvm] [ARM] Fix Machine Outliner crash when tBLXr uses non-tcGPR register (PR #200684)

[Peter Smith via llvm-commits]

================
@@ -5827,9 +5827,11 @@ ARMBaseInstrInfo::getOutliningCandidateInfo(
     SetCandidateCallInfo(MachineOutlinerTailCall, Costs.CallTailCall);
   } else if (LastInstrOpcode == ARM::BL || LastInstrOpcode == ARM::BLX ||
              LastInstrOpcode == ARM::BLX_noip || LastInstrOpcode == ARM::tBL ||
-             LastInstrOpcode == ARM::tBLXr ||
-             LastInstrOpcode == ARM::tBLXr_noip ||
-             LastInstrOpcode == ARM::tBLXi) {
+             LastInstrOpcode == ARM::tBLXi ||
+             ((LastInstrOpcode == ARM::tBLXr ||
+               LastInstrOpcode == ARM::tBLXr_noip) &&
+              ARM::tcGPRRegClass.contains(
+                  RepeatedSequenceLocs[0].back().getOperand(2).getReg()))) {
----------------
smithp35 wrote:

There's also `tcGPRnotr12` which can be used with `v8.1-m and -mbranch-protection`.
Writing an IR test case that uses BLX r12 may be challenging, most likely would need a modified .mir input.

https://github.com/llvm/llvm-project/pull/200684