[llvm] [PowerPC] simplify the asm of scmp builtin (PR #200024)
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Mon Jun 1 07:49:35 PDT 2026
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp llvm/lib/Target/PowerPC/PPCISelLowering.cpp llvm/lib/Target/PowerPC/PPCISelLowering.h --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index a5bdd640f..b5b93ed5a 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -4130,14 +4130,16 @@ bool PPCDAGToDAGISel::trySelectThreeWayCompare(SDNode *N) {
// Force the comparison result into CR7 so we know exact bit positions
SDValue CR7Reg = CurDAG->getRegister(PPC::CR7, MVT::i32);
- SDValue InGlue; // Null incoming flag value
- SDValue CopyToReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, Cmp, InGlue);
+ SDValue InGlue; // Null incoming flag value
+ SDValue CopyToReg =
+ CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, Cmp, InGlue);
SDValue Glue = CopyToReg.getValue(1);
// Now use MFOCRF with CR7
unsigned MFOCRFOpc = Is64BitRes ? PPC::MFOCRF8 : PPC::MFOCRF;
EVT MFVT = Is64BitRes ? MVT::i64 : MVT::i32;
- SDValue MFOCRF = SDValue(CurDAG->getMachineNode(MFOCRFOpc, dl, MFVT, CR7Reg, Glue), 0);
+ SDValue MFOCRF =
+ SDValue(CurDAG->getMachineNode(MFOCRFOpc, dl, MFVT, CR7Reg, Glue), 0);
// Extract LT and GT bits from CR7
SDValue LTBit, GTBit;
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https://github.com/llvm/llvm-project/pull/200024
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