[llvm] [AArch64] Add SVE shuffle optimization pass (PR #193951)

Sander de Smalen via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 1 03:05:45 PDT 2026


================
@@ -0,0 +1,242 @@
+//===------- SVEShuffleOpts - SVE Shuffle Optimization --------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// Tries to pattern match and combine scalable vector shuffles that could
----------------
sdesmalen-arm wrote:

A little example would be useful, especially since from:

> which are then extended and multiplied by a common term loaded in reverse order from memory

it's starting to get complicated :)

What also needs adding is a mention why we do this as an IR pass, as opposed to e.g. a DAG combine. And maybe a comment explaining that this may be a temporary solution because we have a preference for doing this with a generic shuffle and then doing the transform in the LV.

https://github.com/llvm/llvm-project/pull/193951


More information about the llvm-commits mailing list