[llvm] [RISCV][CHERIoT] Define ABI_CHERIOT. (PR #192929)

[Owen Anderson via llvm-commits]

https://github.com/resistor updated https://github.com/llvm/llvm-project/pull/192929

>From c10d872d6590c3e034f94e5bc375a3fd1f5ef4f0 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Mon, 20 Apr 2026 12:16:25 +0200
Subject: [PATCH 1/2] [CHERIoT] Define ABI_CHERIOT.

This corresponds to the CHERIoT ABI, documented here: https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
In particular, CHERIoT is an RV32E-based architecture extended with CHERI support that is not binary compatible with the proposed RV Y base. Amongst other changes, it has customized calling conventions, such as passing f64 in capability registers.
---
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp    | 7 ++++---
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h      | 1 +
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp | 1 +
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
index d5645dc61e6b8..35153a9464908 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -73,10 +73,10 @@ ABI computeTargetABI(const Triple &TT, const FeatureBitset &FeatureBits,
               "target-abi)\n";
     TargetABI = ABI_Unknown;
   } else if (!IsRV64 && IsRVE && TargetABI != ABI_ILP32E &&
-             TargetABI != ABI_Unknown) {
+             TargetABI != ABI_CHERIOT && TargetABI != ABI_Unknown) {
     // TODO: move this checking to RISCVTargetLowering and RISCVAsmParser
-    errs()
-        << "Only the ilp32e ABI is supported for RV32E (ignoring target-abi)\n";
+    errs() << "Only the ilp32e and cheriot ABIs are supported for RV32E "
+              "(ignoring target-abi)\n";
     TargetABI = ABI_Unknown;
   } else if (IsRV64 && IsRVE && TargetABI != ABI_LP64E &&
              TargetABI != ABI_Unknown) {
@@ -118,6 +118,7 @@ ABI getTargetABI(StringRef ABIName) {
                        .Case("l64pc128", ABI_L64PC128)
                        .Case("l64pc128f", ABI_L64PC128F)
                        .Case("l64pc128d", ABI_L64PC128D)
+                       .Case("cheriot", ABI_CHERIOT)
                        .Default(ABI_Unknown);
   return TargetABI;
 }
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index 7f1aa83075f1f..7eb214a268063 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -680,6 +680,7 @@ enum ABI {
   ABI_L64PC128,
   ABI_L64PC128F,
   ABI_L64PC128D,
+  ABI_CHERIOT,
   ABI_Unknown
 };
 
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
index 0bac00910b1fa..22991be4eb091 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
@@ -142,6 +142,7 @@ void RISCVTargetELFStreamer::finish() {
   case RISCVABI::ABI_ILP32E:
   case RISCVABI::ABI_IL32PC64E:
   case RISCVABI::ABI_LP64E:
+  case RISCVABI::ABI_CHERIOT:
     EFlags |= ELF::EF_RISCV_RVE;
     break;
   case RISCVABI::ABI_Unknown:

>From 4d4fef28223a1f66d4ac2b79d2108122070724d7 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor at mac.com>
Date: Mon, 1 Jun 2026 10:29:58 +0200
Subject: [PATCH 2/2] Update test for error message change.

---
 llvm/test/MC/RISCV/target-abi-invalid.s | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/test/MC/RISCV/target-abi-invalid.s b/llvm/test/MC/RISCV/target-abi-invalid.s
index 253af3f1a395a..01b43327a1514 100644
--- a/llvm/test/MC/RISCV/target-abi-invalid.s
+++ b/llvm/test/MC/RISCV/target-abi-invalid.s
@@ -76,10 +76,10 @@
 # RUN:   | FileCheck -check-prefix=RV32EFD-ILP32D %s
 
 # RV32E-ILP32: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
-# RV32EF-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
-# RV32EFD-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
+# RV32EF-ILP32F: Only the ilp32e and cheriot ABIs are supported for RV32E (ignoring target-abi)
+# RV32EFD-ILP32F: Only the ilp32e and cheriot ABIs are supported for RV32E (ignoring target-abi)
 # RV32EFD-ILP32F: LLVM ERROR: ILP32E cannot be used with the D ISA extension
-# RV32EFD-ILP32D: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
+# RV32EFD-ILP32D: Only the ilp32e and cheriot ABIs are supported for RV32E (ignoring target-abi)
 # RV32EFD-ILP32D: LLVM ERROR: ILP32E cannot be used with the D ISA extension
 
 # RUN: llvm-mc -triple=riscv64 -mattr=+e -target-abi lp64 < %s 2>&1 \