[llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)

[Matt Arsenault via llvm-commits]

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@@ -11901,15 +11901,21 @@ define double @flat_atomic_fadd_f64_saddr_rtn(ptr inreg %ptr, double %data) {
 ; GFX1250-SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
 ; GFX1250-SDAG-NEXT:    s_cmp_eq_u32 s1, s3
 ; GFX1250-SDAG-NEXT:    s_cselect_b32 s2, -1, 0
-; GFX1250-SDAG-NEXT:    s_and_not1_b32 vcc_lo, exec_lo, s2
-; GFX1250-SDAG-NEXT:    s_cbranch_vccz .LBB110_3
+; GFX1250-SDAG-NEXT:    s_and_b32 s2, s2, exec_lo
+; GFX1250-SDAG-NEXT:    s_cselect_b32 s2, 1, 0
+; GFX1250-SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-SDAG-NEXT:    s_cmp_lg_u32 s2, 1
+; GFX1250-SDAG-NEXT:    s_cbranch_scc0 .LBB110_3
 ; GFX1250-SDAG-NEXT:  ; %bb.1: ; %atomicrmw.check.private
 ; GFX1250-SDAG-NEXT:    s_xor_b32 s2, s1, src_flat_scratch_base_hi
 ; GFX1250-SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
 ; GFX1250-SDAG-NEXT:    s_cmp_lt_u32 s2, 0x4000000
 ; GFX1250-SDAG-NEXT:    s_cselect_b32 s2, -1, 0
-; GFX1250-SDAG-NEXT:    s_and_not1_b32 vcc_lo, exec_lo, s2
-; GFX1250-SDAG-NEXT:    s_cbranch_vccz .LBB110_4
+; GFX1250-SDAG-NEXT:    s_and_b32 s2, s2, exec_lo
+; GFX1250-SDAG-NEXT:    s_cselect_b32 s2, 1, 0
+; GFX1250-SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
+; GFX1250-SDAG-NEXT:    s_cmp_lg_u32 s2, 1
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arsenm wrote:

Regressions, this looks like it broke a pattern 

https://github.com/llvm/llvm-project/pull/174539