[llvm] [AMDGPU][GISEL] Marking G_DYN_STACKALLOC AlwaysUniform in uniformity analysis (PR #200390)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Abhinav Garg (abhigargrepo)

<details>
<summary>Changes</summary>

Mark G_DYN_STACKALLOC as AlwaysUniform in getGenericInstructionUniformity so that RegBankSelect assigns SGPR to the result. This avoids an unnecessary SGPR-to-VGPR copy of the allocation pointer, reducing register pressure.

---
Full diff: https://github.com/llvm/llvm-project/pull/200390.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.cpp (+4) 
- (added) llvm/test/CodeGen/AMDGPU/GlobalISel/dyn-stackalloc-uniformity.mir (+28) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 2333d2906552f..caacb236fcd1c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -10941,6 +10941,10 @@ SIInstrInfo::getGenericValueUniformity(const MachineInstr &MI) const {
   if (Opcode == TargetOpcode::G_ADDRSPACE_CAST)
     return HandleAddrSpaceCast(MI);
 
+  // G_DYN_STACKALLOC is always uniform as derived from SP (wave-uniform)
+  if (Opcode == TargetOpcode::G_DYN_STACKALLOC)
+    return ValueUniformity::AlwaysUniform;
+
   if (auto *GI = dyn_cast<GIntrinsic>(&MI)) {
     auto IID = GI->getIntrinsicID();
     if (AMDGPU::isIntrinsicSourceOfDivergence(IID))
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/dyn-stackalloc-uniformity.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/dyn-stackalloc-uniformity.mir
new file mode 100644
index 0000000000000..62997d0bbc672
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/dyn-stackalloc-uniformity.mir
@@ -0,0 +1,28 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=amdgpu-regbankselect %s -verify-machineinstrs -o - | FileCheck %s
+
+# Verify that G_DYN_STACKALLOC result is always assigned to SGPR bank,
+# even when the allocation size is divergent (VGPR). The result is derived
+# from the wave-uniform stack pointer.
+
+---
+name: dyn_stackalloc_divergent_size_uniform_result
+legalized: true
+frameInfo:
+  maxAlignment: 4
+stack:
+  - { id: 0, type: variable-sized, alignment: 4 }
+body: |
+  bb.0:
+    liveins: $vgpr0
+
+    ; CHECK-LABEL: name: dyn_stackalloc_divergent_size_uniform_result
+    ; CHECK: liveins: $vgpr0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+    ; CHECK-NEXT: [[DYN_STACKALLOC:%[0-9]+]]:sgpr(p5) = G_DYN_STACKALLOC [[COPY]](s32), 4
+    ; CHECK-NEXT: S_ENDPGM 0, implicit [[DYN_STACKALLOC]](p5)
+    %0:_(s32) = COPY $vgpr0
+    %1:_(p5) = G_DYN_STACKALLOC %0, 4
+    S_ENDPGM 0, implicit %1
+...

``````````

</details>


https://github.com/llvm/llvm-project/pull/200390