[llvm] [DAG] isAllOnesOrAllOnesSplat - handle implicitly truncated constants (PR #200209)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri May 29 03:33:11 PDT 2026
https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/200209
>From 07c9087fff458c02adc20709709b88bd7a1a69fb Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 28 May 2026 16:46:16 +0100
Subject: [PATCH] [DAG] isAllOnesOrAllOnesSplat - handle implicitly truncated
constants
Allow implicit truncation in BUILD_VECTOR/SPLAT_VECTOR splat nodes - we only need 1's in the lower bits of every element
More yak shaving for #198162 where we often have <8 x i1> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1> used in XOR patterns.
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 5 +++--
llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll | 18 ++++++------------
2 files changed, 9 insertions(+), 14 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index b92ba79564f56..75d550801315b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -13795,8 +13795,9 @@ bool llvm::isOneOrOneSplatFP(SDValue N, bool AllowUndefs) {
bool llvm::isAllOnesOrAllOnesSplat(SDValue N, bool AllowUndefs) {
N = peekThroughBitcasts(N);
unsigned BitWidth = N.getScalarValueSizeInBits();
- ConstantSDNode *C = isConstOrConstSplat(N, AllowUndefs);
- return C && C->isAllOnes() && C->getValueSizeInBits(0) == BitWidth;
+ ConstantSDNode *C =
+ isConstOrConstSplat(N, AllowUndefs, /*AllowTruncation=*/true);
+ return C && C->getAPIntValue().countTrailingOnes() >= BitWidth;
}
bool llvm::isOnesOrOnesSplat(SDValue N, bool AllowUndefs) {
diff --git a/llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll b/llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
index 2963c40e8d1b4..f6176c7479a37 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
@@ -658,11 +658,10 @@ entry:
define i32 @vmsk2_sgt_allones_i8(<32 x i8> %a) {
; LA32-LABEL: vmsk2_sgt_allones_i8:
; LA32: # %bb.0: # %entry
-; LA32-NEXT: vrepli.b $vr2, -1
-; LA32-NEXT: vslt.b $vr0, $vr2, $vr0
+; LA32-NEXT: vxori.b $vr0, $vr0, 255
; LA32-NEXT: vmskltz.b $vr0, $vr0
; LA32-NEXT: vpickve2gr.hu $a0, $vr0, 0
-; LA32-NEXT: vslt.b $vr0, $vr2, $vr1
+; LA32-NEXT: vxori.b $vr0, $vr1, 255
; LA32-NEXT: vmskltz.b $vr0, $vr0
; LA32-NEXT: vpickve2gr.hu $a1, $vr0, 0
; LA32-NEXT: slli.w $a1, $a1, 16
@@ -671,11 +670,10 @@ define i32 @vmsk2_sgt_allones_i8(<32 x i8> %a) {
;
; LA64-LABEL: vmsk2_sgt_allones_i8:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: vrepli.b $vr2, -1
-; LA64-NEXT: vslt.b $vr0, $vr2, $vr0
+; LA64-NEXT: vxori.b $vr0, $vr0, 255
; LA64-NEXT: vmskltz.b $vr0, $vr0
; LA64-NEXT: vpickve2gr.hu $a0, $vr0, 0
-; LA64-NEXT: vslt.b $vr0, $vr2, $vr1
+; LA64-NEXT: vxori.b $vr0, $vr1, 255
; LA64-NEXT: vmskltz.b $vr0, $vr0
; LA64-NEXT: vpickve2gr.hu $a1, $vr0, 0
; LA64-NEXT: slli.d $a1, $a1, 16
@@ -776,11 +774,9 @@ entry:
define i32 @vmsk2_sle_allones_i8(<32 x i8> %a) {
; LA32-LABEL: vmsk2_sle_allones_i8:
; LA32: # %bb.0: # %entry
-; LA32-NEXT: vslei.b $vr0, $vr0, -1
; LA32-NEXT: vmskltz.b $vr0, $vr0
; LA32-NEXT: vpickve2gr.hu $a0, $vr0, 0
-; LA32-NEXT: vslei.b $vr0, $vr1, -1
-; LA32-NEXT: vmskltz.b $vr0, $vr0
+; LA32-NEXT: vmskltz.b $vr0, $vr1
; LA32-NEXT: vpickve2gr.hu $a1, $vr0, 0
; LA32-NEXT: slli.w $a1, $a1, 16
; LA32-NEXT: or $a0, $a0, $a1
@@ -788,11 +784,9 @@ define i32 @vmsk2_sle_allones_i8(<32 x i8> %a) {
;
; LA64-LABEL: vmsk2_sle_allones_i8:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: vslei.b $vr0, $vr0, -1
; LA64-NEXT: vmskltz.b $vr0, $vr0
; LA64-NEXT: vpickve2gr.hu $a0, $vr0, 0
-; LA64-NEXT: vslei.b $vr0, $vr1, -1
-; LA64-NEXT: vmskltz.b $vr0, $vr0
+; LA64-NEXT: vmskltz.b $vr0, $vr1
; LA64-NEXT: vpickve2gr.hu $a1, $vr0, 0
; LA64-NEXT: slli.d $a1, $a1, 16
; LA64-NEXT: or $a0, $a0, $a1
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