[llvm] [APInt] Add `bitwiseParity`, `compressBits`, and `expandBits` operations (PR #200114)

[Max Graey via llvm-commits]

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@@ -3259,3 +3259,61 @@ APInt llvm::APIntOps::clmulh(const APInt &LHS, const APInt &RHS) {
   assert(LHS.getBitWidth() == RHS.getBitWidth());
   return clmulr(LHS, RHS).lshr(1);
 }
+
+APInt llvm::APIntOps::bitwiseParity(const APInt &V) {
+  // This computes `clmul(V, ~0)`,
+  // but we don't use `clmul` because this special case has lower complexity
+  // (logarithmic amount of loop iterations instead of linear in BW).
+  unsigned BW = V.getBitWidth();
+  APInt Result = V;
+  for (unsigned I = 1; I < BW; I <<= 1)
+    Result ^= Result.shl(I);
+  return Result;
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MaxGraey wrote:

Also, in a similar way, add an isSingleWord fast-path for the rest of the routines.

https://github.com/llvm/llvm-project/pull/200114