[llvm] [AArch64] Do not generate indexed addressing mode for volatile accesses (PR #196305)

[Nikita Popov via llvm-commits]

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@@ -67,7 +67,8 @@ define float @multi_bb_stpidr2_save_required_stackprobe(i32 %a, float %b, float
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
 ; CHECK-NEXT:    mov x29, sp
-; CHECK-NEXT:    ldr xzr, [sp, #-16]!
+; CHECK-NEXT:    sub sp, sp, #16
+; CHECK-NEXT:    ldr xzr, [sp]
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nikic wrote:

Yeah, that makes sense. I've excluded cases with SP base.

https://github.com/llvm/llvm-project/pull/196305