[llvm] [InstCombine] Fold or(shl(fshr/fshl(a, b, C), C), and(b, mask)) to b (PR #200109)

[Nikita Popov via llvm-commits]

https://github.com/nikic commented:

> SimplifyDemandedBits already handles the single-use case, but when the funnel shift has multiple uses (e.g. AMDGPU TDM descriptor packing in triton-generated GEMM kernels), the demanded-bits analysis cannot simplify. This explicit pattern match enables GVN to prove equality between the reconstructed value and the original, eliminating redundant loop phi chains and removing 2 SALU instructions per loop iteration in the affected kernels.

Do you need the full pattern though? Wouldn't it be enough to fold the fshr + shl combination into an `and`?

> Alive2 proof: https://alive2.llvm.org/ce/z/J5TSjx

https://llvm.org/docs/InstCombineContributorGuide.html#use-generic-values-in-proofs

https://github.com/llvm/llvm-project/pull/200109