[clang] [llvm] [Hexagon] Support reserving R16-R28 registers via -ffixed-rN (PR #197208)

[Alexey Karyakin via llvm-commits]

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@@ -205,8 +205,13 @@ BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
   for (auto Reg : Hexagon_MC::GetVectRegRev())
     Reserved.set(Reg);
 
-  if (MF.getSubtarget<HexagonSubtarget>().hasReservedR19())
-    Reserved.set(Hexagon::R19);
+  static const MCPhysReg RRegs[] = {
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quic-akaryaki wrote:

You can use Register here.

https://github.com/llvm/llvm-project/pull/197208