[llvm] [AMDGPU][InstCombine] Match ds_swizzle rotate mode for cyclic lane shuffles (PR #199004)

[Jay Foad via llvm-commits]

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@@ -883,6 +883,29 @@ matchDsSwizzleBitmaskPattern(ArrayRef<uint8_t> Ids) {
          XorMask << AMDGPU::Swizzle::BITMASK_XOR_SHIFT;
 }
 
+/// Match a GFX9+ DS_SWIZZLE rotate-mode permutation: a cyclic left-rotation
+/// of all 32 lanes within each 32-lane group by a constant N in [1, 31],
+/// i.e. dst_lane = (src_lane + N) % 32. On wave64, hasPeriodicLayout<32>
+/// ensures both 32-lane groups rotate by the same amount.
+static std::optional<unsigned>
+matchDsSwizzleRotatePattern(ArrayRef<uint8_t> Ids) {
+  if (!hasPeriodicLayout<32>(Ids))
+    return std::nullopt;
+
+  // Determine the rotation amount from lane 0: every lane must read from
+  // lane (I + N) % 32 where N = Ids[0] and 1 <= N <= 31.
+  unsigned N = Ids[0];
+  if (N == 0 || N >= 32)
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jayfoad wrote:

Nit: I don't think you need to exclude 0 here. It should still work, even though it is a degenerate case.

https://github.com/llvm/llvm-project/pull/199004