[llvm] [LV] Add support for partial reduction chains with fsubs. (PR #197114)

[Benjamin Maxwell via llvm-commits]

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@@ -6119,13 +6124,18 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
         llvm::is_contained({MVT::i8, MVT::i16, MVT::i32}, InVT.SimpleTy))
       return Cost * 2;
 
-    // SVE2 fmlalb/t and NEON fmlal(2)
+    // SVE2 fml[as]lb/t and NEON fml[as]l(2)
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MacDue wrote:

Not changed here, but I don't think we have any test defending the NEON case with `+fp16fml`. 

https://github.com/llvm/llvm-project/pull/197114