[llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #194887)

[Matt Arsenault via llvm-commits]

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@@ -2753,6 +2795,14 @@ bool RewriteMFMAFormStage::rewrite(
         unsigned UpdateRegion = FI->second;
         DAG.Regions[UpdateRegion].first = VGPRCopy;
         FirstMIToRegion.erase(UseInst);
+        // If UseInst was also the exclusive end of the preceding region, update
+        // that region's end boundary to keep the two sides in sync.
+        DenseMap<MachineInstr *, unsigned>::iterator LMI =
+            LastMIToRegion.find(UseInst);
+        if (LMI != LastMIToRegion.end()) {
+          DAG.Regions[LMI->second].second = VGPRCopy;
+          LastMIToRegion.erase(UseInst);
----------------
arsenm wrote:

```suggestion
          LastMIToRegion.erase(LMI);
```

https://github.com/llvm/llvm-project/pull/194887