[llvm] [VPlan] Fold reverse(reverse(x)) -> x in simplifyRecipe() (PR #196900)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed May 13 02:56:16 PDT 2026
https://github.com/lukel97 commented:
Unfortunately this causes some regressions on RISC-V `-march=rva23u64 -O3` with the following C snippet:
```c++
#include <stdint.h>
#include <stddef.h>
void repro(uint16_t *dst, const uint16_t *src, size_t n) {
for (size_t i = n; i > 0; --i)
dst[i - 1] = src[i - 1];
}
```
The codegen before:
```asm
.LBB0_4: # %vector.body.preheader
li a4, 0
li a6, 1
mv a5, a2
.LBB0_5: # %vector.body
# =>This Inner Loop Header: Depth=1
vsetvli a7, a5, e8, m1, ta, ma
not a3, a4
add t0, a2, a3
sub t1, a6, a7
sh1add a3, t0, a1
sh1add a3, t1, a3
vle16.v v8, (a3)
sub a5, a5, a7
sh1add a3, t0, a0
sh1add a3, t1, a3
vse16.v v8, (a3)
add a4, a4, a7
bnez a5, .LBB0_5
```
And after:
```asm
.LBB0_4: # %vector.ph
li a3, 0
li a4, 2
sub a4, a4, a5
vsetvli a5, zero, e32, m4, ta, ma
vid.v v8
addi a6, a6, -1
vsetvli zero, zero, e16, m2, ta, ma
vid.v v12
vrsub.vx v12, v12, a6
add a6, a1, a4
add a7, a0, a4
vsetvli zero, zero, e8, m1, ta, ma
vmv.v.i v14, 0
mv a4, a2
.LBB0_5: # %vector.body
# =>This Inner Loop Header: Depth=1
vsetvli a5, a4, e8, m1, ta, ma
not a1, a3
vsetvli a0, zero, e32, m4, ta, ma
vmsltu.vx v0, v8, a5
add a1, a1, a2
vsetvli zero, zero, e8, m1, ta, ma
vmerge.vim v15, v14, 1, v0
vrgatherei16.vv v16, v15, v12
vmsne.vi v0, v16, 0
sh1add a0, a1, a6
vle16.v v16, (a0), v0.t
sub a4, a4, a5
sh1add a0, a1, a7
vse16.v v16, (a0), v0.t
add a3, a3, a5
bnez a4, .LBB0_5
```
It looks like we reverse the header mask now which prevents the loads from being converted to vp.loads. I'm not sure what the right fix for this, I'll get back to you on this.
https://github.com/llvm/llvm-project/pull/196900
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