[llvm] Revert "[LV] Handle FSub Partial Reductions" (PR #196922)

via llvm-commits llvm-commits at lists.llvm.org
Mon May 11 03:45:54 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-analysis

Author: Nikita Popov (nikic)

<details>
<summary>Changes</summary>

Reverts llvm/llvm-project#<!-- -->191186.

Causes test failures.

---

Patch is 52.09 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/196922.diff


11 Files Affected:

- (modified) llvm/include/llvm/Analysis/IVDescriptors.h (-5) 
- (modified) llvm/lib/Analysis/IVDescriptors.cpp (+5-31) 
- (modified) llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (+2-3) 
- (modified) llvm/lib/Transforms/Utils/LoopUtils.cpp (-4) 
- (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+6-18) 
- (modified) llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (-6) 
- (modified) llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp (+2-10) 
- (modified) llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp (+2-6) 
- (removed) llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fsub-chained.ll (-38) 
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll (-317) 
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll (-139) 


``````````diff
diff --git a/llvm/include/llvm/Analysis/IVDescriptors.h b/llvm/include/llvm/Analysis/IVDescriptors.h
index 2120eb8cd9914..05c58d1a20afb 100644
--- a/llvm/include/llvm/Analysis/IVDescriptors.h
+++ b/llvm/include/llvm/Analysis/IVDescriptors.h
@@ -46,8 +46,6 @@ enum class RecurKind {
   UMin,     ///< Unsigned integer min implemented in terms of select(cmp()).
   UMax,     ///< Unsigned integer max implemented in terms of select(cmp()).
   FAdd,     ///< Sum of floats.
-  FAddChainWithSubs, ///< A chain of fadds and fsubs.
-  FSub,     ///< Subtraction of floats.
   FMul,     ///< Product of floats.
   FMin,     ///< FP min implemented in terms of select(cmp()).
   FMax,     ///< FP max implemented in terms of select(cmp()).
@@ -247,9 +245,6 @@ class RecurrenceDescriptor {
   /// Returns true if the recurrence kind is a floating point kind.
   LLVM_ABI static bool isFloatingPointRecurrenceKind(RecurKind Kind);
 
-  /// Returns true if the recurrence kind is for a sub operation.
-  LLVM_ABI static bool isSubRecurrenceKind(RecurKind Kind);
-
   /// Returns true if the recurrence kind is an integer min/max kind.
   static bool isIntMinMaxRecurrenceKind(RecurKind Kind) {
     return Kind == RecurKind::UMin || Kind == RecurKind::UMax ||
diff --git a/llvm/lib/Analysis/IVDescriptors.cpp b/llvm/lib/Analysis/IVDescriptors.cpp
index 22a519026f63f..7549e14366d2c 100644
--- a/llvm/lib/Analysis/IVDescriptors.cpp
+++ b/llvm/lib/Analysis/IVDescriptors.cpp
@@ -92,10 +92,6 @@ static Instruction *lookThroughAnd(PHINode *Phi, Type *&RT,
   return Phi;
 }
 
-bool RecurrenceDescriptor::isSubRecurrenceKind(RecurKind Kind) {
-  return Kind == RecurKind::Sub || Kind == RecurKind::FSub;
-}
-
 /// Compute the minimal bit width needed to represent a reduction whose exit
 /// instruction is given by Exit.
 static std::pair<Type *, bool> computeRecurrenceType(Instruction *Exit,
@@ -1013,18 +1009,13 @@ RecurrenceDescriptor::isRecurrenceInstr(Loop *L, PHINode *OrigPhi,
     return InstDesc(Kind == RecurKind::FMul, I,
                     I->hasAllowReassoc() ? nullptr : I);
   case Instruction::FSub:
-    return InstDesc(Kind == RecurKind::FSub ||
-                        Kind == RecurKind::FAddChainWithSubs,
-                    I, I->hasAllowReassoc() ? nullptr : I);
   case Instruction::FAdd:
-    return InstDesc(Kind == RecurKind::FAdd ||
-                        Kind == RecurKind::FAddChainWithSubs,
-                    I, I->hasAllowReassoc() ? nullptr : I);
+    return InstDesc(Kind == RecurKind::FAdd, I,
+                    I->hasAllowReassoc() ? nullptr : I);
   case Instruction::Select:
-    if (isSubRecurrenceKind(Kind) || Kind == RecurKind::FAdd ||
-        Kind == RecurKind::FMul || Kind == RecurKind::Add ||
-        Kind == RecurKind::Mul || Kind == RecurKind::AddChainWithSubs ||
-        Kind == RecurKind::FAddChainWithSubs)
+    if (Kind == RecurKind::FAdd || Kind == RecurKind::FMul ||
+        Kind == RecurKind::Add || Kind == RecurKind::Mul ||
+        Kind == RecurKind::Sub || Kind == RecurKind::AddChainWithSubs)
       return isConditionalRdxPattern(I);
     if (isFindRecurrenceKind(Kind) && SE)
       return isFindPattern(L, OrigPhi, I, *SE);
@@ -1113,20 +1104,10 @@ bool RecurrenceDescriptor::isReductionPHI(PHINode *Phi, Loop *TheLoop,
     LLVM_DEBUG(dbgs() << "Found an FMult reduction PHI." << *Phi << "\n");
     return true;
   }
-  if (AddReductionVar(Phi, RecurKind::FSub, TheLoop, RedDes, DB, AC, DT, SE)) {
-    LLVM_DEBUG(dbgs() << "Found an FSub reduction PHI." << *Phi << "\n");
-    return true;
-  }
   if (AddReductionVar(Phi, RecurKind::FAdd, TheLoop, RedDes, DB, AC, DT, SE)) {
     LLVM_DEBUG(dbgs() << "Found an FAdd reduction PHI." << *Phi << "\n");
     return true;
   }
-  if (AddReductionVar(Phi, RecurKind::FAddChainWithSubs, TheLoop, RedDes, DB,
-                      AC, DT, SE)) {
-    LLVM_DEBUG(dbgs() << "Found a chained FADD-FSUB chained reduction PHI."
-                      << *Phi << "\n");
-    return true;
-  }
   if (AddReductionVar(Phi, RecurKind::FMulAdd, TheLoop, RedDes, DB, AC, DT,
                       SE)) {
     LLVM_DEBUG(dbgs() << "Found an FMulAdd reduction PHI." << *Phi << "\n");
@@ -1243,11 +1224,8 @@ unsigned RecurrenceDescriptor::getOpcode(RecurKind Kind) {
   case RecurKind::FMul:
     return Instruction::FMul;
   case RecurKind::FMulAdd:
-  case RecurKind::FAddChainWithSubs:
   case RecurKind::FAdd:
     return Instruction::FAdd;
-  case RecurKind::FSub:
-    return Instruction::FSub;
   case RecurKind::SMax:
   case RecurKind::SMin:
   case RecurKind::UMax:
@@ -1324,10 +1302,6 @@ RecurrenceDescriptor::getReductionOpChain(PHINode *Phi, Loop *L) const {
         Kind == RecurKind::AddChainWithSubs)
       return true;
 
-    if (Cur->getOpcode() == Instruction::FSub &&
-        Kind == RecurKind::FAddChainWithSubs)
-      return true;
-
     return Cur->getOpcode() == getOpcode();
   };
 
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index 9d86cf7aec45c..2e3e7b73ba390 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -5668,7 +5668,6 @@ bool AArch64TTIImpl::isLegalToVectorizeReduction(
   switch (RdxDesc.getRecurrenceKind()) {
   case RecurKind::Sub:
   case RecurKind::AddChainWithSubs:
-  case RecurKind::FAddChainWithSubs:
   case RecurKind::Add:
   case RecurKind::FAdd:
   case RecurKind::And:
@@ -5990,7 +5989,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
     return Invalid;
 
   if ((Opcode != Instruction::Add && Opcode != Instruction::Sub &&
-       Opcode != Instruction::FAdd && Opcode != Instruction::FSub) ||
+       Opcode != Instruction::FAdd) ||
       OpAExtend == TTI::PR_None)
     return Invalid;
 
@@ -6057,7 +6056,7 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
             NEONPred);
   };
 
-  bool IsSub = (Opcode == Instruction::Sub) || (Opcode == Instruction::FSub);
+  bool IsSub = Opcode == Instruction::Sub;
   InstructionCost Cost = InputLT.first * TTI::TCC_Basic;
   // Integer partial sub-reductions that don't map to a specific instruction,
   // carry an extra cost for implementing a double negation:
diff --git a/llvm/lib/Transforms/Utils/LoopUtils.cpp b/llvm/lib/Transforms/Utils/LoopUtils.cpp
index f0586e4f0f464..cc965cb36c36e 100644
--- a/llvm/lib/Transforms/Utils/LoopUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUtils.cpp
@@ -1110,8 +1110,6 @@ constexpr Intrinsic::ID llvm::getReductionIntrinsicID(RecurKind RK) {
   case RecurKind::Xor:
     return Intrinsic::vector_reduce_xor;
   case RecurKind::FMulAdd:
-  case RecurKind::FAddChainWithSubs:
-  case RecurKind::FSub:
   case RecurKind::FAdd:
     return Intrinsic::vector_reduce_fadd;
   case RecurKind::FMul:
@@ -1569,8 +1567,6 @@ Value *llvm::createSimpleReduction(IRBuilderBase &Builder, Value *Src,
   case RecurKind::FMaximumNum:
     return Builder.CreateUnaryIntrinsic(getReductionIntrinsicID(RdxKind), Src);
   case RecurKind::FMulAdd:
-  case RecurKind::FAddChainWithSubs:
-  case RecurKind::FSub:
   case RecurKind::FAdd:
     return Builder.CreateFAddReduce(getIdentity(), Src);
   case RecurKind::FMul:
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index e77e5024e2cc4..1ace2275e2b6d 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7767,28 +7767,16 @@ static SmallVector<Instruction *> preparePlanForEpilogueVectorLoop(
           // reduction start value in a final subtraction. Update it to use the
           // resume value from the main vector loop.
           if (PhiR->getVFScaleFactor() > 1 &&
-              RecurrenceDescriptor::isSubRecurrenceKind(
-                  PhiR->getRecurrenceKind())) {
+              PhiR->getRecurrenceKind() == RecurKind::Sub) {
             auto *Sub = cast<VPInstruction>(RdxResult->getSingleUser());
-            assert((Sub->getOpcode() == Instruction::Sub ||
-                    Sub->getOpcode() == Instruction::FSub) &&
-                   "Unexpected opcode");
+            assert(Sub->getOpcode() == Instruction::Sub && "Unexpected opcode");
             assert(isa<VPIRValue>(Sub->getOperand(0)) &&
                    "Expected operand to match the original start value of the "
                    "reduction");
-            // For integer sub-reductions, verify start value is zero.
-            // For FP sub-reductions, verify start value is negative zero.
-            [[maybe_unused]] auto StartValueIsIdentity = [&] {
-              Value *IdentityValue = getRecurrenceIdentity(
-                  PhiR->getRecurrenceKind(), ResumeV->getType(),
-                  PhiR->getFastMathFlags());
-              auto *StartValue = dyn_cast<VPIRValue>(VPI->getOperand(0));
-              return StartValue && StartValue->getValue() == IdentityValue;
-            };
-            assert(StartValueIsIdentity() &&
-                   "Expected start value for partial sub-reduction to be zero "
-                   "(or negative zero)");
-
+            assert(VPlanPatternMatch::match(VPI->getOperand(0),
+                                            VPlanPatternMatch::m_ZeroInt()) &&
+                   "Expected start value for partial sub-reduction to start at "
+                   "zero");
             Sub->setOperand(0, StartVal);
           } else
             VPI->setOperand(0, StartVal);
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index c41170758efd5..f1a6eb2d7e8af 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -29540,8 +29540,6 @@ class HorizontalReduction {
           // res = vv
           break;
         case RecurKind::Sub:
-        case RecurKind::FSub:
-        case RecurKind::FAddChainWithSubs:
         case RecurKind::AddChainWithSubs:
         case RecurKind::Mul:
         case RecurKind::FMul:
@@ -29693,8 +29691,6 @@ class HorizontalReduction {
       // res = vv
       return VectorizedValue;
     case RecurKind::Sub:
-    case RecurKind::FSub:
-    case RecurKind::FAddChainWithSubs:
     case RecurKind::AddChainWithSubs:
     case RecurKind::Mul:
     case RecurKind::FMul:
@@ -29798,8 +29794,6 @@ class HorizontalReduction {
       return Builder.CreateFMul(VectorizedValue, Scale);
     }
     case RecurKind::Sub:
-    case RecurKind::FSub:
-    case RecurKind::FAddChainWithSubs:
     case RecurKind::AddChainWithSubs:
     case RecurKind::Mul:
     case RecurKind::FMul:
diff --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index 25b2853d002a7..11a91dcd46867 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -578,14 +578,6 @@ bool VPInstruction::canGenerateScalarForFirstLane() const {
   }
 }
 
-static Instruction::BinaryOps getSubRecurOpcode(RecurKind Kind) {
-  if (Kind == RecurKind::Sub)
-    return Instruction::Add;
-  if (Kind == RecurKind::FSub)
-    return Instruction::FAdd;
-  llvm_unreachable("RecurKind should be Sub/FSub.");
-}
-
 Value *VPInstruction::generate(VPTransformState &State) {
   IRBuilderBase &Builder = State.Builder;
 
@@ -799,8 +791,8 @@ Value *VPInstruction::generate(VPTransformState &State) {
           // For sub-recurrences, each part's reduction variable is already
           // negative, we need to do: reduce.add(-acc_uf0 + -acc_uf1)
           Instruction::BinaryOps Opcode =
-              RecurrenceDescriptor::isSubRecurrenceKind(RK)
-                  ? getSubRecurOpcode(RK)
+              RK == RecurKind::Sub
+                  ? Instruction::Add
                   : (Instruction::BinaryOps)RecurrenceDescriptor::getOpcode(RK);
           ReducedPartRdx =
               Builder.CreateBinOp(Opcode, RdxPart, ReducedPartRdx, "bin.rdx");
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index 6b50494ea364b..32d89a34105a4 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -6013,9 +6013,6 @@ static void transformToPartialReduction(const VPPartialReductionChain &Chain,
     ExtendedOp = NegRecipe;
   }
 
-  assert((Chain.RK != RecurKind::FAddChainWithSubs) &&
-         "FSub chain reduction isn't supported");
-
   // FIXME: Do these transforms before invoking the cost-model.
   ExtendedOp = optimizeExtendsForPartialReduction(ExtendedOp, TypeInfo);
 
@@ -6067,7 +6064,7 @@ static void transformToPartialReduction(const VPPartialReductionChain &Chain,
   // If this is the last value in a sub-reduction chain, then update the PHI
   // node to start at `0` and update the reduction-result to subtract from
   // the PHI's start value.
-  if (Chain.RK != RecurKind::Sub && Chain.RK != RecurKind::FSub)
+  if (Chain.RK != RecurKind::Sub)
     return;
 
   VPValue *OldStartValue = StartInst->getOperand(0);
@@ -6078,8 +6075,7 @@ static void transformToPartialReduction(const VPPartialReductionChain &Chain,
   assert(RdxResult && "Could not find reduction result");
 
   VPBuilder Builder = VPBuilder::getToInsertAfter(RdxResult);
-  unsigned SubOpc = Chain.RK == RecurKind::FSub ? Instruction::BinaryOps::FSub
-                                                : Instruction::BinaryOps::Sub;
+  constexpr unsigned SubOpc = Instruction::BinaryOps::Sub;
   VPInstruction *NewResult = Builder.createNaryOp(
       SubOpc, {OldStartValue, RdxResult}, VPIRFlags::getDefaultFlags(SubOpc),
       RdxPhi->getDebugLoc());
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fsub-chained.ll b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fsub-chained.ll
deleted file mode 100644
index f22be2c5fd977..0000000000000
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fsub-chained.ll
+++ /dev/null
@@ -1,38 +0,0 @@
-; REQUIRES: asserts
-; RUN: not --crash opt -passes=loop-vectorize -S %s 2>&1 | FileCheck %s --check-prefix=ASSERTION
-
-; Tests a partial reduction with an fadd->fsub chain.
-; There's an assertion preventing this type of partial reduction from
-; being generated as the current codegen for this case is incorrect.
-
-target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-none-unknown-elf"
-
-; ASSERTION: (Chain.RK != RecurKind::FAddChainWithSubs)
-define float @fadd_fsub_reduction(float %startval, ptr %src1, ptr %src2, ptr %src3) #0 {
-entry:
-  br label %loop
-
-loop:
-  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
-  %accum = phi float [ %startval, %entry ], [ %sub, %loop ]
-  %src1.gep = getelementptr half, ptr %src1, i32 %iv
-  %src1.load = load half, ptr %src1.gep, align 4
-  %src1.load.ext = fpext half %src1.load to float
-  %src2.gep = getelementptr half, ptr %src2, i32 %iv
-  %src2.load = load half, ptr %src2.gep, align 4
-  %src2.load.ext = fpext half %src2.load to float
-  %src3.gep = getelementptr half, ptr %src3, i32 %iv
-  %src3.load = load half, ptr %src3.gep, align 4
-  %src3.load.ext = fpext half %src3.load to float
-  %mul1 = fmul reassoc contract float %src1.load.ext, %src2.load.ext
-  %add = fadd reassoc contract float %accum, %mul1
-  %mul2 = fmul reassoc contract float %src3.load.ext, %src1.load.ext
-  %sub = fsub reassoc contract float %add, %mul2
-  %iv.next = add i32 %iv, 1
-  %exitcond.not = icmp eq i32 %iv, 1024
-  br i1 %exitcond.not, label %exit, label %loop
-
-exit:
-  ret float %sub
-}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
index 21c9b9cde13ba..8db3a3294d7bc 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-epilogue-vec.ll
@@ -185,321 +185,4 @@ exit:
   ret i32 %sub
 }
 
-define float @fsub_reduction(float %startval, ptr %src1, ptr %src2) #0 {
-; CHECK-EPI-LABEL: define float @fsub_reduction(
-; CHECK-EPI-SAME: float [[STARTVAL:%.*]], ptr [[SRC1:%.*]], ptr [[SRC2:%.*]]) #[[ATTR0]] {
-; CHECK-EPI-NEXT:  [[VECTOR_MAIN_LOOP_ITER_CHECK:.*]]:
-; CHECK-EPI-NEXT:    br i1 false, label %[[VEC_EPILOG_VECTOR_BODY:.*]], label %[[VECTOR_MAIN_LOOP_ITER_CHECK1:.*]]
-; CHECK-EPI:       [[VECTOR_MAIN_LOOP_ITER_CHECK1]]:
-; CHECK-EPI-NEXT:    br i1 false, label %[[VEC_EPILOG_PH:.*]], label %[[VECTOR_PH1:.*]]
-; CHECK-EPI:       [[VECTOR_PH1]]:
-; CHECK-EPI-NEXT:    br label %[[VECTOR_PH:.*]]
-; CHECK-EPI:       [[VECTOR_PH]]:
-; CHECK-EPI-NEXT:    [[INDEX1:%.*]] = phi i32 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT1:%.*]], %[[VECTOR_PH]] ]
-; CHECK-EPI-NEXT:    [[VEC_PHI:%.*]] = phi <8 x float> [ splat (float -0.000000e+00), %[[VECTOR_PH1]] ], [ [[PARTIAL_REDUCE:%.*]], %[[VECTOR_PH]] ]
-; CHECK-EPI-NEXT:    [[TMP0:%.*]] = getelementptr half, ptr [[SRC1]], i32 [[INDEX1]]
-; CHECK-EPI-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x half>, ptr [[TMP0]], align 4
-; CHECK-EPI-NEXT:    [[TMP1:%.*]] = getelementptr half, ptr [[SRC2]], i32 [[INDEX1]]
-; CHECK-EPI-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x half>, ptr [[TMP1]], align 4
-; CHECK-EPI-NEXT:    [[TMP5:%.*]] = fpext <16 x half> [[WIDE_LOAD]] to <16 x float>
-; CHECK-EPI-NEXT:    [[TMP10:%.*]] = fpext <16 x half> [[WIDE_LOAD1]] to <16 x float>
-; CHECK-EPI-NEXT:    [[TMP11:%.*]] = fmul reassoc contract <16 x float> [[TMP5]], [[TMP10]]
-; CHECK-EPI-NEXT:    [[PARTIAL_REDUCE]] = call reassoc contract <8 x float> @llvm.vector.partial.reduce.fadd.v8f32.v16f32(<8 x float> [[VEC_PHI]], <16 x float> [[TMP11]])
-; CHECK-EPI-NEXT:    [[INDEX_NEXT1]] = add nuw i32 [[INDEX1]], 16
-; CHECK-EPI-NEXT:    [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT1]], 32
-; CHECK-EPI-NEXT:    br i1 [[TMP13]], label %[[MIDDLE_BLOCK1:.*]], label %[[VECTOR_PH]], !llvm.loop [[LOOP6:![0-9]+]]
-; CHECK-EPI:       [[MIDDLE_BLOCK1]]:
-; CHECK-EPI-NEXT:    [[TMP6:%.*]] = call reassoc contract float @llvm.vector.reduce.fadd.v8f32(float -0.000000e+00, <8 x float> [[PARTIAL_REDUCE]])
-; CHECK-EPI-NEXT:    [[TMP7:%.*]] = fsub float [[STARTVAL]], [[TMP6]]
-; CHECK-EPI-NEXT:    br i1 false, label %[[EXIT:.*]], label %[[VEC_EPILOG_ITER_CHECK:.*]]
-; CHECK-EPI:       [[VEC_EPILOG_ITER_CHECK]]:
-; CHECK-EPI-NEXT:    br i1 false, label %[[VEC_EPILOG_VECTOR_BODY]], label %[[VEC_EPILOG_PH]], !prof [[PROF3]]
-; CHECK-EPI:       [[VEC_EPILOG_PH]]:
-; CHECK-EPI-NEXT:    [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i32 [ 32, %[[VEC_EPILOG_ITER_CHECK]] ], [ 0, %[[VECTOR_MAIN_LOOP_ITER_CHECK1]] ]
-; CHECK-EPI-NEXT:    [[BC_MERGE_RDX:%.*]] = phi float [ [[TMP7]], %[[VEC_EPILOG_ITER_CHECK]] ], [ [[STARTVAL]], %[[VECTOR_MAIN_LOOP_ITER_CHECK1]] ]
-; CHECK-EPI-NEXT:    br label %[[VECTOR_BODY:.*]]
-; CHECK-EPI:       [[VECTOR_BODY]]:
-; CHECK-EPI-NEXT:    [[INDEX:%.*]] = phi i32 [ [[VEC_EPILOG_RESUME_VAL]], %[[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-EPI-NEXT:    [[VEC_PHI3:%.*]] = phi <2 x float> [ splat (float -0.000000e+00), %[[VEC_EPILOG_PH]] ], [ [[PARTIAL_REDUCE6:%.*]], %[[VECTOR_BODY]] ]
-; CHECK-EPI-NEXT:    [[TMP8:%.*]] = getelementptr half, ptr [[SRC1]], i32 [[INDEX]]
-; CHECK-EPI-NEXT:    [[WIDE_LOAD4:%.*]] = load <4 x half>, ptr [[TMP8]], align 4
-; CHECK-EPI-NEXT:    [[TMP9:%.*]] = getelementptr half, ptr [[SRC2]], i32 [[INDEX]]
-; CHECK-EPI-NEXT:    [[WIDE_LOAD5:%.*]] = load <4 x half>, ptr [[TMP9]], align 4
-; CHECK-EPI-NEXT:    [[TMP2:%.*]] = fpext <4 x half> [[WIDE_LOAD4]] to <4 x float>
-; CHECK-EPI-NEXT:    [[TMP3:%.*]] = fpext <4 x half> [[WIDE_LOAD5]] to <4 x float>
-; CHECK-EPI-NEXT:    [[TMP4:%.*]] = fmul reassoc contract <4 x float> [[TMP2]], [[TMP3]]
-; CHECK-EPI-NEXT:    [[PARTIAL_REDUCE6]] = call reassoc contract <2 x float> @llvm.vector.partial.reduce.fadd.v2f32.v4f32(<2 x float> [[VEC_PHI3]], <4 x float> [[TMP4]])
-; CHECK-EPI-NEXT:    [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
-; CHECK-EPI-NEXT:    [[TMP16:%.*]] = icmp eq i32 [[INDEX_NEXT]], 40
-; CHECK-EPI-NEXT:    br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
-; CHECK-EPI:       [[MIDDLE_BLOCK]]:
-; CHECK-EPI-NEXT:    [[TMP14:%.*]] = call reassoc contract float @llvm.vector.reduce.fadd.v2f32(float -0.000000e+00, <2 x float> [[PARTIAL_REDUCE6]])
-; CHECK-EPI-NEXT:    [[TMP15:%.*]] = f...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/196922


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