[llvm] Use auto for DenseMap/SmallDenseMap iterator variables. NFC (PR #196883)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun May 10 23:44:31 PDT 2026
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/196883
To match the prevailing style.
>From a1f3a14f2be52a7c2084d62cde83f8ae14e428ba Mon Sep 17 00:00:00 2001
From: Fangrui Song <i at maskray.me>
Date: Sun, 10 May 2026 23:32:38 -0700
Subject: [PATCH] Use auto for DenseMap/SmallDenseMap iterator variables. NFC
To match the prevailing style.
---
llvm/include/llvm/ADT/SCCIterator.h | 3 +--
llvm/include/llvm/ADT/ScopedHashTable.h | 3 +--
.../llvm/Analysis/IRSimilarityIdentifier.h | 8 +++----
llvm/include/llvm/Analysis/LoopIterator.h | 4 ++--
.../llvm/CodeGen/FunctionLoweringInfo.h | 2 +-
.../Transforms/Utils/InstructionWorklist.h | 2 +-
llvm/lib/Analysis/CallGraphSCCPass.cpp | 3 +--
llvm/lib/Analysis/ScalarEvolution.cpp | 2 +-
llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 +-
llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 2 +-
.../CodeGen/AsmPrinter/DebugHandlerBase.cpp | 6 ++---
llvm/lib/CodeGen/CodeGenPrepare.cpp | 3 +--
llvm/lib/CodeGen/MachineCSE.cpp | 2 +-
llvm/lib/CodeGen/MachineCombiner.cpp | 3 +--
llvm/lib/CodeGen/PeepholeOptimizer.cpp | 2 +-
llvm/lib/CodeGen/RegAllocFast.cpp | 2 +-
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 6 ++---
.../SelectionDAG/LegalizeVectorOps.cpp | 2 +-
.../CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 2 +-
.../SelectionDAG/ScheduleDAGSDNodes.cpp | 3 +--
.../SelectionDAG/SelectionDAGBuilder.cpp | 10 ++++----
.../CodeGen/SelectionDAG/SelectionDAGISel.cpp | 7 +++---
llvm/lib/CodeGen/TailDuplicator.cpp | 9 +++----
.../lib/CodeGen/TwoAddressInstructionPass.cpp | 12 +++++-----
llvm/lib/IR/LegacyPassManager.cpp | 14 +++++------
llvm/lib/IR/Value.cpp | 3 +--
llvm/lib/MC/MCRegisterInfo.cpp | 4 ++--
llvm/lib/Target/AArch64/AArch64FastISel.cpp | 3 +--
llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 12 ++++------
.../AMDGPU/R600OptimizeVectorRegisters.cpp | 3 +--
llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 2 +-
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +-
llvm/lib/Target/ARM/ARMFastISel.cpp | 6 ++---
llvm/lib/Target/ARM/ARMMachineFunctionInfo.h | 2 +-
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +-
llvm/lib/Target/Mips/MipsFastISel.cpp | 6 ++---
llvm/lib/Target/PowerPC/PPCFastISel.cpp | 6 ++---
.../WebAssembly/WebAssemblyFastISel.cpp | 6 ++---
llvm/lib/Target/X86/X86FastISel.cpp | 5 ++--
llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +-
llvm/lib/Transforms/IPO/IROutliner.cpp | 24 +++++++------------
.../Instrumentation/DataFlowSanitizer.cpp | 3 +--
llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp | 7 +++---
llvm/lib/Transforms/Scalar/GVN.cpp | 4 ++--
llvm/lib/Transforms/Scalar/SROA.cpp | 3 +--
.../Utils/PromoteMemoryToRegister.cpp | 6 ++---
llvm/lib/Transforms/Utils/SCCPSolver.cpp | 3 +--
llvm/lib/Transforms/Utils/SSAUpdater.cpp | 2 +-
llvm/tools/llvm-sim/llvm-sim.cpp | 2 +-
49 files changed, 95 insertions(+), 137 deletions(-)
diff --git a/llvm/include/llvm/ADT/SCCIterator.h b/llvm/include/llvm/ADT/SCCIterator.h
index 205fa669a12de..5e0ca2eb949a0 100644
--- a/llvm/include/llvm/ADT/SCCIterator.h
+++ b/llvm/include/llvm/ADT/SCCIterator.h
@@ -165,8 +165,7 @@ void scc_iterator<GraphT, GT>::DFSVisitChildren() {
while (VisitStack.back().NextChild != GT::child_end(VisitStack.back().Node)) {
// TOS has at least one more child so continue DFS
NodeRef childN = *VisitStack.back().NextChild++;
- typename DenseMap<NodeRef, unsigned>::iterator Visited =
- nodeVisitNumbers.find(childN);
+ auto Visited = nodeVisitNumbers.find(childN);
if (Visited == nodeVisitNumbers.end()) {
// this node has never been seen.
DFSVisitOne(childN);
diff --git a/llvm/include/llvm/ADT/ScopedHashTable.h b/llvm/include/llvm/ADT/ScopedHashTable.h
index cc977012b2394..8fb4aa5da8cf5 100644
--- a/llvm/include/llvm/ADT/ScopedHashTable.h
+++ b/llvm/include/llvm/ADT/ScopedHashTable.h
@@ -219,8 +219,7 @@ class ScopedHashTable : detail::AllocatorHolder<AllocatorTy> {
iterator end() { return iterator(nullptr); }
iterator begin(const K &Key) {
- typename DenseMap<K, ValTy*, KInfo>::iterator I =
- TopLevelMap.find(Key);
+ auto I = TopLevelMap.find(Key);
if (I == TopLevelMap.end()) return end();
return iterator(I->second);
}
diff --git a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
index 4e0f23f9cc8fb..d8e58ad2a9219 100644
--- a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
+++ b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
@@ -960,7 +960,7 @@ class IRSimilarityCandidate {
/// \returns std::nullopt if not present.
std::optional<unsigned> getGVN(Value *V) {
assert(V != nullptr && "Value is a nullptr?");
- DenseMap<Value *, unsigned>::iterator VNIt = ValueToNumber.find(V);
+ auto VNIt = ValueToNumber.find(V);
if (VNIt == ValueToNumber.end())
return std::nullopt;
return VNIt->second;
@@ -971,7 +971,7 @@ class IRSimilarityCandidate {
/// \returns The Value associated with the number.
/// \returns std::nullopt if not present.
std::optional<Value *> fromGVN(unsigned Num) {
- DenseMap<unsigned, Value *>::iterator VNIt = NumberToValue.find(Num);
+ auto VNIt = NumberToValue.find(Num);
if (VNIt == NumberToValue.end())
return std::nullopt;
assert(VNIt->second != nullptr && "Found value is a nullptr!");
@@ -985,7 +985,7 @@ class IRSimilarityCandidate {
/// \returns An optional containing the value, and std::nullopt if it could
/// not be found.
std::optional<unsigned> getCanonicalNum(unsigned N) {
- DenseMap<unsigned, unsigned>::iterator NCIt = NumberToCanonNum.find(N);
+ auto NCIt = NumberToCanonNum.find(N);
if (NCIt == NumberToCanonNum.end())
return std::nullopt;
return NCIt->second;
@@ -998,7 +998,7 @@ class IRSimilarityCandidate {
/// \returns An optional containing the value, and std::nullopt if it could
/// not be found.
std::optional<unsigned> fromCanonicalNum(unsigned N) {
- DenseMap<unsigned, unsigned>::iterator CNIt = CanonNumToNumber.find(N);
+ auto CNIt = CanonNumToNumber.find(N);
if (CNIt == CanonNumToNumber.end())
return std::nullopt;
return CNIt->second;
diff --git a/llvm/include/llvm/Analysis/LoopIterator.h b/llvm/include/llvm/Analysis/LoopIterator.h
index 6d25b2fd8923c..f403d658e2a5c 100644
--- a/llvm/include/llvm/Analysis/LoopIterator.h
+++ b/llvm/include/llvm/Analysis/LoopIterator.h
@@ -144,13 +144,13 @@ class LoopBlocksDFS {
/// Return true if this block has a postorder number.
bool hasPostorder(BasicBlock *BB) const {
- DenseMap<BasicBlock*, unsigned>::const_iterator I = PostNumbers.find(BB);
+ auto I = PostNumbers.find(BB);
return I != PostNumbers.end() && I->second;
}
/// Get a block's postorder number.
unsigned getPostorder(BasicBlock *BB) const {
- DenseMap<BasicBlock*, unsigned>::const_iterator I = PostNumbers.find(BB);
+ auto I = PostNumbers.find(BB);
assert(I != PostNumbers.end() && "block not visited by DFS");
assert(I->second && "block not finished by DFS");
return I->second;
diff --git a/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h b/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
index fc76751a2342f..c1031b55f7fd8 100644
--- a/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+++ b/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
@@ -265,7 +265,7 @@ class FunctionLoweringInfo {
/// called when a block is visited before all of its predecessors.
void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
// PHIs with no uses have no ValueMap entry.
- DenseMap<const Value*, Register>::const_iterator It = ValueMap.find(PN);
+ auto It = ValueMap.find(PN);
if (It == ValueMap.end())
return;
diff --git a/llvm/include/llvm/Transforms/Utils/InstructionWorklist.h b/llvm/include/llvm/Transforms/Utils/InstructionWorklist.h
index c8f20636965e8..5a46fff651336 100644
--- a/llvm/include/llvm/Transforms/Utils/InstructionWorklist.h
+++ b/llvm/include/llvm/Transforms/Utils/InstructionWorklist.h
@@ -83,7 +83,7 @@ class InstructionWorklist {
/// Remove I from the worklist if it exists.
void remove(Instruction *I) {
- DenseMap<Instruction *, unsigned>::iterator It = WorklistMap.find(I);
+ auto It = WorklistMap.find(I);
if (It != WorklistMap.end()) {
// Don't bother moving everything down, just null out the slot.
Worklist[It->second] = nullptr;
diff --git a/llvm/lib/Analysis/CallGraphSCCPass.cpp b/llvm/lib/Analysis/CallGraphSCCPass.cpp
index 1228d5b4b78be..9213ea8ea2383 100644
--- a/llvm/lib/Analysis/CallGraphSCCPass.cpp
+++ b/llvm/lib/Analysis/CallGraphSCCPass.cpp
@@ -318,8 +318,7 @@ bool CGPassManager::RefreshCallGraph(const CallGraphSCC &CurSCC, CallGraph &CG,
// If this call site already existed in the callgraph, just verify it
// matches up to expectations and remove it from Calls.
- DenseMap<Value *, CallGraphNode *>::iterator ExistingIt =
- Calls.find(Call);
+ auto ExistingIt = Calls.find(Call);
if (ExistingIt != Calls.end()) {
CallGraphNode *ExistingNode = ExistingIt->second;
diff --git a/llvm/lib/Analysis/ScalarEvolution.cpp b/llvm/lib/Analysis/ScalarEvolution.cpp
index 94fdd36dbcb22..3d17c2aadefd5 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -6838,7 +6838,7 @@ const ConstantRange &ScalarEvolution::getRangeRef(
: ConstantRange::Signed;
// See if we've computed this range already.
- DenseMap<const SCEV *, ConstantRange>::iterator I = Cache.find(S);
+ auto I = Cache.find(S);
if (I != Cache.end())
return I->second;
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index 83babe1c62541..3e863f4786e1a 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -7058,7 +7058,7 @@ Error BitcodeReader::materialize(GlobalValue *GV) {
if (!F || !F->isMaterializable())
return Error::success();
- DenseMap<Function*, uint64_t>::iterator DFII = DeferredFunctionInfo.find(F);
+ auto DFII = DeferredFunctionInfo.find(F);
assert(DFII != DeferredFunctionInfo.end() && "Deferred function not found!");
// If its position is recorded as 0, its body is somewhere in the stream
// but we haven't seen it yet.
diff --git a/llvm/lib/Bitcode/Reader/MetadataLoader.cpp b/llvm/lib/Bitcode/Reader/MetadataLoader.cpp
index 0155f15b1ab17..a11e5609d5294 100644
--- a/llvm/lib/Bitcode/Reader/MetadataLoader.cpp
+++ b/llvm/lib/Bitcode/Reader/MetadataLoader.cpp
@@ -2598,7 +2598,7 @@ Error MetadataLoader::MetadataLoaderImpl::parseMetadataAttachment(
Instruction *Inst = InstructionList[Record[0]];
for (unsigned i = 1; i != RecordLength; i = i + 2) {
unsigned Kind = Record[i];
- DenseMap<unsigned, unsigned>::iterator I = MDKindMap.find(Kind);
+ auto I = MDKindMap.find(Kind);
if (I == MDKindMap.end())
return error("Invalid ID");
if (I->second == LLVMContext::MD_tbaa && StripTBAA)
diff --git a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
index dc38f5a6887c2..8787c12bf3a5f 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
@@ -369,8 +369,7 @@ void DebugHandlerBase::beginInstruction(const MachineInstr *MI) {
CurMI = MI;
// Insert labels where requested.
- DenseMap<const MachineInstr *, MCSymbol *>::iterator I =
- LabelsBeforeInsn.find(MI);
+ auto I = LabelsBeforeInsn.find(MI);
// No label needed.
if (I == LabelsBeforeInsn.end())
@@ -399,8 +398,7 @@ void DebugHandlerBase::endInstruction() {
PrevInstBB = CurMI->getParent();
}
- DenseMap<const MachineInstr *, MCSymbol *>::iterator I =
- LabelsAfterInsn.find(CurMI);
+ auto I = LabelsAfterInsn.find(CurMI);
// No label needed or label already assigned.
if (I == LabelsAfterInsn.end() || I->second) {
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 22d7d221c2670..74a0502d8cb7c 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -7263,8 +7263,7 @@ bool CodeGenPrepare::performAddressTypePromotion(
bool AllSeenFirst = true;
for (auto *I : SpeculativelyMovedExts) {
Value *HeadOfChain = I->getOperand(0);
- DenseMap<Value *, Instruction *>::iterator AlreadySeen =
- SeenChainsForSExt.find(HeadOfChain);
+ auto AlreadySeen = SeenChainsForSExt.find(HeadOfChain);
// If there is an unhandled SExt which has the same header, try to promote
// it as well.
if (AlreadySeen != SeenChainsForSExt.end()) {
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 67ecb80bc3ee0..01ccd742d72b3 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -517,7 +517,7 @@ void MachineCSEImpl::EnterScope(MachineBasicBlock *MBB) {
void MachineCSEImpl::ExitScope(MachineBasicBlock *MBB) {
LLVM_DEBUG(dbgs() << "Exiting: " << MBB->getName() << '\n');
- DenseMap<MachineBasicBlock*, ScopeType*>::iterator SI = ScopeMap.find(MBB);
+ auto SI = ScopeMap.find(MBB);
assert(SI != ScopeMap.end());
delete SI->second;
ScopeMap.erase(SI);
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index b86e70f265786..0161e70fa2c8a 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -213,8 +213,7 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
continue;
unsigned DepthOp = 0;
unsigned LatencyOp = 0;
- DenseMap<Register, unsigned>::iterator II =
- InstrIdxForVirtReg.find(MO.getReg());
+ auto II = InstrIdxForVirtReg.find(MO.getReg());
if (II != InstrIdxForVirtReg.end()) {
// Operand is new virtual register not in trace
assert(II->second < InstrDepth.size() && "Bad Index");
diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index 1acca1fb2659f..1cd2ec5c1cded 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -1427,7 +1427,7 @@ bool PeepholeOptimizer::foldImmediate(
continue;
if (ImmDefRegs.count(Reg) == 0)
continue;
- DenseMap<Register, MachineInstr *>::iterator II = ImmDefMIs.find(Reg);
+ auto II = ImmDefMIs.find(Reg);
assert(II != ImmDefMIs.end() && "couldn't find immediate definition");
if (TII->foldImmediate(MI, *II->second, Reg, MRI)) {
++NumImmFold;
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index 7998b87a59c96..6241ae94130dc 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -1776,7 +1776,7 @@ void RegAllocFastImpl::handleBundle(MachineInstr &MI) {
if (!Reg.isVirtual() || !shouldAllocateRegister(Reg))
continue;
- DenseMap<Register, LiveReg>::iterator DI = BundleVirtRegsMap.find(Reg);
+ auto DI = BundleVirtRegsMap.find(Reg);
assert(DI != BundleVirtRegsMap.end() && "Unassigned virtual register");
setPhysReg(MI, MO, DI->second);
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
index 9774f2c721d1f..1b6d7b57c2c58 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -148,7 +148,7 @@ bool FastISel::lowerArguments() {
for (Function::const_arg_iterator I = FuncInfo.Fn->arg_begin(),
E = FuncInfo.Fn->arg_end();
I != E; ++I) {
- DenseMap<const Value *, Register>::iterator VI = LocalValueMap.find(&*I);
+ auto VI = LocalValueMap.find(&*I);
assert(VI != LocalValueMap.end() && "Missed an argument?");
FuncInfo.ValueMap[&*I] = VI->second;
}
@@ -354,7 +354,7 @@ Register FastISel::lookUpRegForValue(const Value *V) {
// cache values defined by Instructions across blocks, and other values
// only locally. This is because Instructions already have the SSA
// def-dominates-use requirement enforced.
- DenseMap<const Value *, Register>::iterator I = FuncInfo.ValueMap.find(V);
+ auto I = FuncInfo.ValueMap.find(V);
if (I != FuncInfo.ValueMap.end())
return I->second;
return LocalValueMap[V];
@@ -1717,7 +1717,7 @@ bool FastISel::selectExtractValue(const User *U) {
// Get the base result register.
Register ResultReg;
- DenseMap<const Value *, Register>::iterator I = FuncInfo.ValueMap.find(Op0);
+ auto I = FuncInfo.ValueMap.find(Op0);
if (I != FuncInfo.ValueMap.end())
ResultReg = I->second;
else if (isa<Instruction>(Op0))
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index e5484bf3676db..eb89a0f129df4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -272,7 +272,7 @@ VectorLegalizer::RecursivelyLegalizeResults(SDValue Op,
SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
// Note that LegalizeOp may be reentered even from single-use nodes, which
// means that we always must cache transformed nodes.
- DenseMap<SDValue, SDValue>::iterator I = LegalizedNodes.find(Op);
+ auto I = LegalizedNodes.find(Op);
if (I != LegalizedNodes.end()) return I->second;
// Legalize the operands
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
index 5af3df161b6c5..9b76ebdb0f8fa 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
@@ -693,7 +693,7 @@ void ScheduleDAGLinearize::ScheduleNode(SDNode *N) {
// Glue operand is already scheduled.
continue;
- DenseMap<SDNode*, SDNode*>::iterator DI = GluedMap.find(OpN);
+ auto DI = GluedMap.find(OpN);
if (DI != GluedMap.end() && DI->second != N)
// Users of glues are counted against the glued users.
OpN = DI->second;
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index c51e2de30934b..1b28e3a9dc3a3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -813,8 +813,7 @@ EmitPhysRegCopy(SUnit *SU, SmallDenseMap<SUnit *, Register, 16> &VRBaseMap,
continue; // ignore chain preds
if (Pred.getSUnit()->CopyDstRC) {
// Copy to physical register.
- DenseMap<SUnit *, Register>::iterator VRI =
- VRBaseMap.find(Pred.getSUnit());
+ auto VRI = VRBaseMap.find(Pred.getSUnit());
assert(VRI != VRBaseMap.end() && "Node emitted out of order - late");
// Find the destination physical register.
Register Reg;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index e88a07901e289..68ae86d8d561f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1776,7 +1776,7 @@ void SelectionDAGBuilder::resolveOrClearDbgInfo() {
/// getCopyFromRegs - If there was virtual register allocated for the value V
/// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise.
SDValue SelectionDAGBuilder::getCopyFromRegs(const Value *V, Type *Ty) {
- DenseMap<const Value *, Register>::iterator It = FuncInfo.ValueMap.find(V);
+ auto It = FuncInfo.ValueMap.find(V);
SDValue Result;
if (It != FuncInfo.ValueMap.end()) {
@@ -2010,8 +2010,7 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
// If this is a static alloca, generate it as the frameindex instead of
// computation.
if (const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
- DenseMap<const AllocaInst*, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end())
return DAG.getFrameIndex(
SI->second, TLI.getValueType(DAG.getDataLayout(), AI->getType()));
@@ -2362,7 +2361,7 @@ void SelectionDAGBuilder::CopyToExportRegsIfNeeded(const Value *V) {
if (V->getType()->isEmptyTy())
return;
- DenseMap<const Value *, Register>::iterator VMI = FuncInfo.ValueMap.find(V);
+ auto VMI = FuncInfo.ValueMap.find(V);
if (VMI != FuncInfo.ValueMap.end()) {
assert((!V->use_empty() || isa<CallBrInst>(V)) &&
"Unused value assigned virtual registers!");
@@ -12346,8 +12345,7 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
}
Reg = RegOut;
} else {
- DenseMap<const Value *, Register>::iterator I =
- FuncInfo.ValueMap.find(PHIOp);
+ auto I = FuncInfo.ValueMap.find(PHIOp);
if (I != FuncInfo.ValueMap.end())
Reg = I->second;
else {
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 7aec7f41c15f2..3dc599b556ddd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -669,15 +669,14 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// registers. If we don't apply the reg fixups before, some registers may
// appear as unused and will be skipped, resulting in bad MI.
MachineRegisterInfo &MRI = MF->getRegInfo();
- for (DenseMap<Register, Register>::iterator I = FuncInfo->RegFixups.begin(),
- E = FuncInfo->RegFixups.end();
+ for (auto I = FuncInfo->RegFixups.begin(), E = FuncInfo->RegFixups.end();
I != E; ++I) {
Register From = I->first;
Register To = I->second;
// If To is also scheduled to be replaced, find what its ultimate
// replacement is.
while (true) {
- DenseMap<Register, Register>::iterator J = FuncInfo->RegFixups.find(To);
+ auto J = FuncInfo->RegFixups.find(To);
if (J == E)
break;
To = J->second;
@@ -752,7 +751,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// If Reg is live-in then update debug info to track its copy in a vreg.
if (!Reg.isPhysical())
continue;
- DenseMap<MCRegister, Register>::iterator LDI = LiveInMap.find(Reg);
+ auto LDI = LiveInMap.find(Reg);
if (LDI != LiveInMap.end()) {
assert(!hasFI && "There's no handling of frame pointer updating here yet "
"- add if needed");
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index b0888c1c44d57..4a972b360998b 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -212,8 +212,7 @@ bool TailDuplicator::tailDuplicateAndUpdate(
}
// Add the new vregs as available values.
- DenseMap<Register, AvailableValsTy>::iterator LI =
- SSAUpdateVals.find(VReg);
+ auto LI = SSAUpdateVals.find(VReg);
for (std::pair<MachineBasicBlock *, Register> &J : LI->second) {
MachineBasicBlock *SrcBB = J.first;
Register SrcReg = J.second;
@@ -338,8 +337,7 @@ static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
/// Add a definition and source virtual registers pair for SSA update.
void TailDuplicator::addSSAUpdateEntry(Register OrigReg, Register NewReg,
MachineBasicBlock *BB) {
- DenseMap<Register, AvailableValsTy>::iterator LI =
- SSAUpdateVals.find(OrigReg);
+ auto LI = SSAUpdateVals.find(OrigReg);
if (LI != SSAUpdateVals.end())
LI->second.push_back(std::make_pair(BB, NewReg));
else {
@@ -522,8 +520,7 @@ void TailDuplicator::updateSuccessorsPHIs(
// If Idx is set, the operands at Idx and Idx+1 must be removed.
// We reuse the location to avoid expensive removeOperand calls.
- DenseMap<Register, AvailableValsTy>::iterator LI =
- SSAUpdateVals.find(Reg);
+ auto LI = SSAUpdateVals.find(Reg);
if (LI != SSAUpdateVals.end()) {
// This register is defined in the tail block.
for (const std::pair<MachineBasicBlock *, Register> &J : LI->second) {
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 351aa6179d86a..fb3014d87f40a 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -361,7 +361,7 @@ bool TwoAddressInstructionImpl::noUseAfterLastDef(Register Reg, unsigned Dist,
MachineInstr *MI = MO.getParent();
if (MI->getParent() != MBB || MI->isDebugValue())
continue;
- DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(MI);
+ auto DI = DistanceMap.find(MI);
if (DI == DistanceMap.end())
continue;
if (MO.isUse() && DI->second < LastUse)
@@ -550,7 +550,7 @@ MachineInstr *TwoAddressInstructionImpl::findOnlyInterestingUse(
static MCRegister getMappedReg(Register Reg,
DenseMap<Register, Register> &RegMap) {
while (Reg.isVirtual()) {
- DenseMap<Register, Register>::iterator SI = RegMap.find(Reg);
+ auto SI = RegMap.find(Reg);
if (SI == RegMap.end())
return 0;
Reg = SI->second;
@@ -863,7 +863,7 @@ void TwoAddressInstructionImpl::scanUses(Register DstReg) {
if (IsCopy && !Processed.insert(UseMI).second)
break;
- DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
+ auto DI = DistanceMap.find(UseMI);
if (DI != DistanceMap.end())
// Earlier in the same MBB.Reached via a back edge.
break;
@@ -939,7 +939,7 @@ bool TwoAddressInstructionImpl::rescheduleMIBelowKill(
return false;
MachineInstr *MI = &*mi;
- DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(MI);
+ auto DI = DistanceMap.find(MI);
if (DI == DistanceMap.end())
// Must be created from unfolded load. Don't waste time trying this.
return false;
@@ -1104,7 +1104,7 @@ bool TwoAddressInstructionImpl::isDefTooClose(Register Reg, unsigned Dist,
continue;
if (&DefMI == MI)
return true; // MI is defining something KillMI uses
- DenseMap<MachineInstr*, unsigned>::iterator DDI = DistanceMap.find(&DefMI);
+ auto DDI = DistanceMap.find(&DefMI);
if (DDI == DistanceMap.end())
return true; // Below MI
unsigned DefDist = DDI->second;
@@ -1127,7 +1127,7 @@ bool TwoAddressInstructionImpl::rescheduleKillAboveMI(
return false;
MachineInstr *MI = &*mi;
- DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(MI);
+ auto DI = DistanceMap.find(MI);
if (DI == DistanceMap.end())
// Must be created from unfolded load. Don't waste time trying this.
return false;
diff --git a/llvm/lib/IR/LegacyPassManager.cpp b/llvm/lib/IR/LegacyPassManager.cpp
index 47a828842b481..7b9ad89038dc6 100644
--- a/llvm/lib/IR/LegacyPassManager.cpp
+++ b/llvm/lib/IR/LegacyPassManager.cpp
@@ -903,9 +903,9 @@ void PMDataManager::removeNotPreservedAnalysis(Pass *P) {
return;
const AnalysisUsage::VectorType &PreservedSet = AnUsage->getPreservedSet();
- for (DenseMap<AnalysisID, Pass*>::iterator I = AvailableAnalysis.begin(),
- E = AvailableAnalysis.end(); I != E; ) {
- DenseMap<AnalysisID, Pass*>::iterator Info = I++;
+ for (auto I = AvailableAnalysis.begin(), E = AvailableAnalysis.end();
+ I != E;) {
+ auto Info = I++;
if (Info->second->getAsImmutablePass() == nullptr &&
!is_contained(PreservedSet, Info->first)) {
// Remove this analysis
@@ -924,10 +924,8 @@ void PMDataManager::removeNotPreservedAnalysis(Pass *P) {
if (!IA)
continue;
- for (DenseMap<AnalysisID, Pass *>::iterator I = IA->begin(),
- E = IA->end();
- I != E;) {
- DenseMap<AnalysisID, Pass *>::iterator Info = I++;
+ for (auto I = IA->begin(), E = IA->end(); I != E;) {
+ auto Info = I++;
if (Info->second->getAsImmutablePass() == nullptr &&
!is_contained(PreservedSet, Info->first)) {
// Remove this analysis
@@ -1098,7 +1096,7 @@ void PMDataManager::initializeAnalysisImpl(Pass *P) {
Pass *PMDataManager::findAnalysisPass(AnalysisID AID, bool SearchParent) {
// Check if AvailableAnalysis map has one entry.
- DenseMap<AnalysisID, Pass*>::const_iterator I = AvailableAnalysis.find(AID);
+ auto I = AvailableAnalysis.find(AID);
if (I != AvailableAnalysis.end())
return I->second;
diff --git a/llvm/lib/IR/Value.cpp b/llvm/lib/IR/Value.cpp
index 360bf0f8fc47f..7246adf7ec651 100644
--- a/llvm/lib/IR/Value.cpp
+++ b/llvm/lib/IR/Value.cpp
@@ -1195,8 +1195,7 @@ void ValueHandleBase::AddToUseList() {
}
// Okay, reallocation did happen. Fix the Prev Pointers.
- for (DenseMap<Value*, ValueHandleBase*>::iterator I = Handles.begin(),
- E = Handles.end(); I != E; ++I) {
+ for (auto I = Handles.begin(), E = Handles.end(); I != E; ++I) {
assert(I->second && I->first == I->second->getValPtr() &&
"List invariant broken!");
I->second->setPrevPtr(&I->second);
diff --git a/llvm/lib/MC/MCRegisterInfo.cpp b/llvm/lib/MC/MCRegisterInfo.cpp
index 77fb7332619cd..8ac752ab91a07 100644
--- a/llvm/lib/MC/MCRegisterInfo.cpp
+++ b/llvm/lib/MC/MCRegisterInfo.cpp
@@ -192,7 +192,7 @@ int64_t MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(uint64_t RegNum) const {
}
int MCRegisterInfo::getSEHRegNum(MCRegister Reg) const {
- const DenseMap<MCRegister, int>::const_iterator I = L2SEHRegs.find(Reg);
+ const auto I = L2SEHRegs.find(Reg);
if (I == L2SEHRegs.end())
return (int)Reg.id();
return I->second;
@@ -201,7 +201,7 @@ int MCRegisterInfo::getSEHRegNum(MCRegister Reg) const {
int MCRegisterInfo::getCodeViewRegNum(MCRegister Reg) const {
if (L2CVRegs.empty())
report_fatal_error("target does not implement codeview register mapping");
- const DenseMap<MCRegister, int>::const_iterator I = L2CVRegs.find(Reg);
+ const auto I = L2CVRegs.find(Reg);
if (I == L2CVRegs.end())
report_fatal_error("unknown codeview register " + (Reg.id() < getNumRegs()
? getName(Reg)
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index b9c317a2071ca..6c218de2c43c3 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -676,8 +676,7 @@ bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
}
case Instruction::Alloca: {
const AllocaInst *AI = cast<AllocaInst>(Obj);
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Addr.setKind(Address::FrameIndexBase);
Addr.setFI(SI->second);
diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 5d20d1e10a0da..727ae68e88bfb 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -2557,7 +2557,7 @@ bool RewriteMFMAFormStage::rewrite(
}
if (!Src2DefsReplace.empty()) {
- DenseMap<Register, Register>::iterator RI = RedefMap.find(Src2Reg);
+ auto RI = RedefMap.find(Src2Reg);
if (RI != RedefMap.end()) {
MappedReg = RI->second;
} else {
@@ -2641,7 +2641,7 @@ bool RewriteMFMAFormStage::rewrite(
}
if (!DstUseDefsReplace.empty()) {
- DenseMap<Register, Register>::iterator RI = RedefMap.find(DstReg);
+ auto RI = RedefMap.find(DstReg);
if (RI != RedefMap.end()) {
MappedReg = RI->second;
} else {
@@ -2668,8 +2668,7 @@ bool RewriteMFMAFormStage::rewrite(
// If this reaching def was the last MI in the region, update the
// region boundaries.
- DenseMap<MachineInstr *, unsigned>::iterator LMI =
- LastMIToRegion.find(RD);
+ auto LMI = LastMIToRegion.find(RD);
if (LMI != LastMIToRegion.end()) {
unsigned UpdateRegion = LMI->second;
DAG.Regions[UpdateRegion].second = VGPRCopy;
@@ -2747,8 +2746,7 @@ bool RewriteMFMAFormStage::rewrite(
// If this UseInst was the first MI in the region, update the region
// boundaries.
- DenseMap<MachineInstr *, unsigned>::iterator FI =
- FirstMIToRegion.find(UseInst);
+ auto FI = FirstMIToRegion.find(UseInst);
if (FI != FirstMIToRegion.end()) {
unsigned UpdateRegion = FI->second;
DAG.Regions[UpdateRegion].first = VGPRCopy;
@@ -2782,7 +2780,7 @@ bool RewriteMFMAFormStage::rewrite(
Register RegToRewrite = RewriteReg;
// Be sure to update the replacement register and not the original.
- DenseMap<Register, Register>::iterator RI = RedefMap.find(RewriteReg);
+ auto RI = RedefMap.find(RewriteReg);
if (RI != RedefMap.end())
RegToRewrite = RI->second;
diff --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
index 9e1a97e95dc23..1ad357228df3f 100644
--- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
@@ -150,8 +150,7 @@ bool R600VectorRegMerger::tryMergeVector(const RegSeqInfo *Untouched,
const {
unsigned CurrentUndexIdx = 0;
for (auto &It : ToMerge->RegToChan) {
- DenseMap<Register, unsigned>::const_iterator PosInUntouched =
- Untouched->RegToChan.find(It.first);
+ auto PosInUntouched = Untouched->RegToChan.find(It.first);
if (PosInUntouched != Untouched->RegToChan.end()) {
Remap.emplace_back(It.second, (*PosInUntouched).second);
continue;
diff --git a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
index 301cb21a808f8..c240fae120c33 100644
--- a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
@@ -129,7 +129,7 @@ class R600PacketizerList : public VLIWPacketizerList {
if (OperandIdx < 0)
continue;
Register Src = MI.getOperand(OperandIdx).getReg();
- const DenseMap<unsigned, unsigned>::const_iterator It = PVs.find(Src);
+ const auto It = PVs.find(Src);
if (It != PVs.end())
MI.getOperand(OperandIdx).setReg(It->second);
}
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index eb8ff794ad8a6..3b1b8673e56a0 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -4825,7 +4825,7 @@ bool
ARMBaseInstrInfo::isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc,
unsigned &AddSubOpc,
bool &NegAcc, bool &HasLane) const {
- DenseMap<unsigned, unsigned>::const_iterator I = MLxEntryMap.find(Opcode);
+ auto I = MLxEntryMap.find(Opcode);
if (I == MLxEntryMap.end())
return false;
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 0d416152b3a36..2c5d286e11c4f 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -683,8 +683,7 @@ Register ARMFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
if (!isLoadTypeLegal(AI->getType(), VT))
return Register();
- DenseMap<const AllocaInst*, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
// This will get lowered later into the correct offsets and registers
// via rewriteXFrameIndex.
@@ -817,8 +816,7 @@ bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) {
}
case Instruction::Alloca: {
const AllocaInst *AI = cast<AllocaInst>(Obj);
- DenseMap<const AllocaInst*, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Addr.setKind(Address::FrameIndexBase);
Addr.setFI(SI->second);
diff --git a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
index b6897608a952c..59d328783a37b 100644
--- a/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
+++ b/llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
@@ -252,7 +252,7 @@ class ARMFunctionInfo : public MachineFunctionInfo {
}
unsigned getOriginalCPIdx(unsigned CloneIdx) const {
- DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx);
+ auto I = CPEClones.find(CloneIdx);
if (I != CPEClones.end())
return I->second;
else
diff --git a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
index e497845742ef5..a7edf8d105c02 100644
--- a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
+++ b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -1010,7 +1010,7 @@ bool Thumb2SizeReduce::ReduceMI(MachineBasicBlock &MBB, MachineInstr *MI,
bool LiveCPSR, bool IsSelfLoop,
bool SkipPrologueEpilogue) {
unsigned Opcode = MI->getOpcode();
- DenseMap<unsigned, unsigned>::iterator OPI = ReduceOpcodeMap.find(Opcode);
+ auto OPI = ReduceOpcodeMap.find(Opcode);
if (OPI == ReduceOpcodeMap.end())
return false;
if (SkipPrologueEpilogue && (MI->getFlag(MachineInstr::FrameSetup) ||
diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp
index 4c0f817234b92..9645fb5293609 100644
--- a/llvm/lib/Target/Mips/MipsFastISel.cpp
+++ b/llvm/lib/Target/Mips/MipsFastISel.cpp
@@ -336,8 +336,7 @@ Register MipsFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
assert(TLI.getValueType(DL, AI->getType(), true) == MVT::i32 &&
"Alloca should always return a pointer.");
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Register ResultReg = createResultReg(&Mips::GPR32RegClass);
@@ -527,8 +526,7 @@ bool MipsFastISel::computeAddress(const Value *Obj, Address &Addr) {
}
case Instruction::Alloca: {
const AllocaInst *AI = cast<AllocaInst>(Obj);
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Addr.setKind(Address::FrameIndexBase);
Addr.setFI(SI->second);
diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
index c02b10300b304..dec5dbdfc2258 100644
--- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
@@ -375,8 +375,7 @@ bool PPCFastISel::PPCComputeAddress(const Value *Obj, Address &Addr) {
}
case Instruction::Alloca: {
const AllocaInst *AI = cast<AllocaInst>(Obj);
- DenseMap<const AllocaInst*, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Addr.BaseType = Address::FrameIndexBase;
Addr.Base.FI = SI->second;
@@ -2270,8 +2269,7 @@ Register PPCFastISel::fastMaterializeConstant(const Constant *C) {
// Materialize the address created by an alloca into a register, and
// return the register number (or zero if we failed to handle it).
Register PPCFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
// Don't handle dynamic allocas.
if (SI == FuncInfo.StaticAllocaMap.end())
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index 99305f371551f..b107886a1f16e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -324,8 +324,7 @@ bool WebAssemblyFastISel::computeAddress(const Value *Obj, Address &Addr) {
}
case Instruction::Alloca: {
const auto *AI = cast<AllocaInst>(Obj);
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
if (Addr.isSet()) {
return false;
@@ -674,8 +673,7 @@ unsigned WebAssemblyFastISel::copyValue(unsigned Reg) {
}
Register WebAssemblyFastISel::fastMaterializeAlloca(const AllocaInst *AI) {
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
+ auto SI = FuncInfo.StaticAllocaMap.find(AI);
if (SI != FuncInfo.StaticAllocaMap.end()) {
Register ResultReg =
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index f91ef4abbdf27..4daff4517e940 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -761,7 +761,7 @@ bool X86FastISel::handleConstantAddresses(const Value *V, X86AddressMode &AM) {
// Ok, we need to do a load from a stub. If we've already loaded from
// this stub, reuse the loaded pointer, otherwise emit the load now.
- DenseMap<const Value *, Register>::iterator I = LocalValueMap.find(V);
+ auto I = LocalValueMap.find(V);
Register LoadReg;
if (I != LocalValueMap.end() && I->second) {
LoadReg = I->second;
@@ -874,8 +874,7 @@ bool X86FastISel::X86SelectAddress(const Value *V, X86AddressMode &AM) {
case Instruction::Alloca: {
// Do static allocas.
const AllocaInst *A = cast<AllocaInst>(V);
- DenseMap<const AllocaInst *, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(A);
+ auto SI = FuncInfo.StaticAllocaMap.find(A);
if (SI != FuncInfo.StaticAllocaMap.end()) {
AM.BaseType = X86AddressMode::FrameIndexBase;
AM.Base.FrameIndex = SI->second;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 4b193c8db3303..f4529ddf4983d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23759,7 +23759,7 @@ static bool matchScalarReduction(SDValue Op, ISD::NodeType BinOp,
return false;
SDValue Src = I->getOperand(0);
- DenseMap<SDValue, APInt>::iterator M = SrcOpMap.find(Src);
+ auto M = SrcOpMap.find(Src);
if (M == SrcOpMap.end()) {
VT = Src.getValueType();
// Quit if not the same type.
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp b/llvm/lib/Transforms/IPO/IROutliner.cpp
index c1640f3d0e2a7..0e780d41c93ed 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -513,8 +513,7 @@ InstructionCost OutlinableRegion::getBenefit(TargetTransformInfo &TTI) {
/// not.
static Value *findOutputMapping(const DenseMap<Value *, Value *> OutputMappings,
Value *Input) {
- DenseMap<Value *, Value *>::const_iterator OutputMapping =
- OutputMappings.find(Input);
+ auto OutputMapping = OutputMappings.find(Input);
if (OutputMapping != OutputMappings.end())
return OutputMapping->second;
return Input;
@@ -929,8 +928,7 @@ findExtractedInputToOverallInputMapping(OutlinableRegion &Region,
assert(InputOpt && "Global value number not found?");
Value *Input = *InputOpt;
- DenseMap<unsigned, unsigned>::iterator AggArgIt =
- Group.CanonicalNumberToAggArg.find(CanonicalNumber);
+ auto AggArgIt = Group.CanonicalNumberToAggArg.find(CanonicalNumber);
if (!Group.InputTypesSet) {
Group.ArgumentTypes.push_back(Input->getType());
@@ -1731,8 +1729,7 @@ findOrCreatePHIInBlock(PHINode &PN, OutlinableRegion &Region,
IncomingVal = findOutputMapping(OutputMappings, IncomingVal);
Value *Val = Region.findCorrespondingValueIn(*FirstRegion, IncomingVal);
assert(Val && "Value is nullptr?");
- DenseMap<Value *, Value *>::iterator RemappedIt =
- FirstRegion->RemappedArguments.find(Val);
+ auto RemappedIt = FirstRegion->RemappedArguments.find(Val);
if (RemappedIt != FirstRegion->RemappedArguments.end())
Val = RemappedIt->second;
NewPN->setIncomingValue(Idx, Val);
@@ -1925,8 +1922,7 @@ std::optional<unsigned> findDuplicateOutputBlock(
for (DenseMap<Value *, BasicBlock *> &CompBBs : OutputStoreBBs) {
Mismatch = false;
for (std::pair<Value *, BasicBlock *> &VToB : CompBBs) {
- DenseMap<Value *, BasicBlock *>::iterator OutputBBIt =
- OutputBBs.find(VToB.first);
+ auto OutputBBIt = OutputBBs.find(VToB.first);
if (OutputBBIt == OutputBBs.end()) {
Mismatch = true;
break;
@@ -2051,8 +2047,7 @@ static void alignOutputBlockWithAggFunc(
for (std::pair<Value *, BasicBlock *> &VtoBB : OutputBBs) {
RetValueForBB = VtoBB.first;
NewBB = VtoBB.second;
- DenseMap<Value *, BasicBlock *>::iterator VBBIt =
- EndBBs.find(RetValueForBB);
+ auto VBBIt = EndBBs.find(RetValueForBB);
LLVM_DEBUG(dbgs() << "Create output block for region in"
<< Region.ExtractedFunction << " to "
<< *NewBB);
@@ -2130,8 +2125,7 @@ void createSwitchStatement(
unsigned Idx = 0;
for (DenseMap<Value *, BasicBlock *> &OutputStoreBB : OutputStoreBBs) {
- DenseMap<Value *, BasicBlock *>::iterator OSBBIt =
- OutputStoreBB.find(OutputBlock.first);
+ auto OSBBIt = OutputStoreBB.find(OutputBlock.first);
if (OSBBIt == OutputStoreBB.end())
continue;
@@ -2160,8 +2154,7 @@ void createSwitchStatement(
<< *OG.OutlinedFunction << "\n");
DenseMap<Value *, BasicBlock *> OutputBlocks = OutputStoreBBs[0];
for (std::pair<Value *, BasicBlock *> &VBPair : OutputBlocks) {
- DenseMap<Value *, BasicBlock *>::iterator EndBBIt =
- EndBBs.find(VBPair.first);
+ auto EndBBIt = EndBBs.find(VBPair.first);
assert(EndBBIt != EndBBs.end() && "Could not find end block");
BasicBlock *EndBB = EndBBIt->second;
BasicBlock *OutputBB = VBPair.second;
@@ -2215,8 +2208,7 @@ void IROutliner::fillOverallFunction(
if (!analyzeAndPruneOutputBlocks(NewBBs, *CurrentOS)) {
OutputStoreBBs.push_back(DenseMap<Value *, BasicBlock *>());
for (std::pair<Value *, BasicBlock *> &VToBB : NewBBs) {
- DenseMap<Value *, BasicBlock *>::iterator VBBIt =
- CurrentGroup.EndBBs.find(VToBB.first);
+ auto VBBIt = CurrentGroup.EndBBs.find(VToBB.first);
BasicBlock *EndBB = VBBIt->second;
UncondBrInst::Create(EndBB, VToBB.second);
OutputStoreBBs.back().insert(VToBB);
diff --git a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
index 648df1f545f01..c349fe33dd237 100644
--- a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
@@ -3381,8 +3381,7 @@ void DFSanVisitor::visitCallBase(CallBase &CB) {
}
}
- DenseMap<Value *, Function *>::iterator UnwrappedFnIt =
- DFSF.DFS.UnwrappedFnMap.find(CB.getCalledOperand());
+ auto UnwrappedFnIt = DFSF.DFS.UnwrappedFnMap.find(CB.getCalledOperand());
if (UnwrappedFnIt != DFSF.DFS.UnwrappedFnMap.end())
if (visitWrappedCallBase(*UnwrappedFnIt->second, CB))
return;
diff --git a/llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp b/llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
index f796266f0cf3c..a32f824299b09 100644
--- a/llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
+++ b/llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
@@ -1262,8 +1262,7 @@ ObjCARCOpt::CheckForCFGHazards(const BasicBlock *BB,
for (const BasicBlock *Succ : successors(BB)) {
// If VisitBottomUp has pointer information for this successor, take
// what we know about it.
- const DenseMap<const BasicBlock *, BBState>::iterator BBI =
- BBStates.find(Succ);
+ const auto BBI = BBStates.find(Succ);
assert(BBI != BBStates.end());
const BottomUpPtrState &SuccS = BBI->second.getPtrBottomUpState(Arg);
const Sequence SuccSSeq = SuccS.GetSeq();
@@ -1405,7 +1404,7 @@ bool ObjCARCOpt::VisitBottomUp(BasicBlock *BB,
SE(MyStates.succ_end());
if (SI != SE) {
const BasicBlock *Succ = *SI;
- DenseMap<const BasicBlock *, BBState>::iterator I = BBStates.find(Succ);
+ auto I = BBStates.find(Succ);
assert(I != BBStates.end());
MyStates.InitFromSucc(I->second);
++SI;
@@ -1589,7 +1588,7 @@ bool ObjCARCOpt::VisitTopDown(
PE(MyStates.pred_end());
if (PI != PE) {
const BasicBlock *Pred = *PI;
- DenseMap<const BasicBlock *, BBState>::iterator I = BBStates.find(Pred);
+ auto I = BBStates.find(Pred);
assert(I != BBStates.end());
MyStates.InitFromPred(I->second);
++PI;
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp
index 2794fb27cae69..0965c2ab361c0 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -648,7 +648,7 @@ uint32_t GVNPass::ValueTable::lookupOrAdd(MemoryAccess *MA) {
/// lookupOrAdd - Returns the value number for the specified value, assigning
/// it a new number if it did not have one before.
uint32_t GVNPass::ValueTable::lookupOrAdd(Value *V) {
- DenseMap<Value *, uint32_t>::iterator VI = ValueNumbering.find(V);
+ auto VI = ValueNumbering.find(V);
if (VI != ValueNumbering.end())
return VI->second;
@@ -733,7 +733,7 @@ uint32_t GVNPass::ValueTable::lookupOrAdd(Value *V) {
/// Returns the value number of the specified value. Fails if
/// the value has not yet been numbered.
uint32_t GVNPass::ValueTable::lookup(Value *V, bool Verify) const {
- DenseMap<Value *, uint32_t>::const_iterator VI = ValueNumbering.find(V);
+ auto VI = ValueNumbering.find(V);
if (Verify) {
assert(VI != ValueNumbering.end() && "Value not numbered?");
return VI->second;
diff --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp
index 7e798ef29c1b8..83e40edb64541 100644
--- a/llvm/lib/Transforms/Scalar/SROA.cpp
+++ b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -1207,8 +1207,7 @@ class AllocaSlices::SliceBuilder : public PtrUseVisitor<SliceBuilder> {
// FIXME: Yet another place we really should bypass this when
// instrumenting for ASan.
if (Offset.uge(AllocSize)) {
- SmallDenseMap<Instruction *, unsigned>::iterator MTPI =
- MemTransferSliceMap.find(&II);
+ auto MTPI = MemTransferSliceMap.find(&II);
if (MTPI != MemTransferSliceMap.end())
AS.Slices[MTPI->second].kill();
return markAsDead(II);
diff --git a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
index ef668e575f3ea..b635d805bf13d 100644
--- a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -349,7 +349,7 @@ class LargeBlockInfo {
"Not a load/store to/from an alloca?");
// If we already have this instruction number, return it.
- DenseMap<const Instruction *, unsigned>::iterator It = InstNumbers.find(I);
+ auto It = InstNumbers.find(I);
if (It != InstNumbers.end())
return It->second;
@@ -1187,7 +1187,7 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred) {
if (!Src)
continue;
- DenseMap<AllocaInst *, unsigned>::iterator AI = AllocaLookup.find(Src);
+ auto AI = AllocaLookup.find(Src);
if (AI == AllocaLookup.end())
continue;
@@ -1204,7 +1204,7 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred) {
if (!Dest)
continue;
- DenseMap<AllocaInst *, unsigned>::iterator ai = AllocaLookup.find(Dest);
+ auto ai = AllocaLookup.find(Dest);
if (ai == AllocaLookup.end())
continue;
diff --git a/llvm/lib/Transforms/Utils/SCCPSolver.cpp b/llvm/lib/Transforms/Utils/SCCPSolver.cpp
index 9ba1002533997..4cae040f96fc6 100644
--- a/llvm/lib/Transforms/Utils/SCCPSolver.cpp
+++ b/llvm/lib/Transforms/Utils/SCCPSolver.cpp
@@ -938,8 +938,7 @@ class SCCPInstVisitor : public InstVisitor<SCCPInstVisitor> {
const ValueLatticeElement &getLatticeValueFor(Value *V) const {
assert(!V->getType()->isStructTy() &&
"Should use getStructLatticeValueFor");
- DenseMap<Value *, ValueLatticeElement>::const_iterator I =
- ValueState.find(V);
+ auto I = ValueState.find(V);
assert(I != ValueState.end() &&
"V not found in ValueState nor Paramstate map!");
return I->second;
diff --git a/llvm/lib/Transforms/Utils/SSAUpdater.cpp b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
index 49d0d9584347e..c2a234bb1928d 100644
--- a/llvm/lib/Transforms/Utils/SSAUpdater.cpp
+++ b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
@@ -499,7 +499,7 @@ void LoadAndStorePromoter::run(const SmallVectorImpl<Instruction *> &Insts) {
// Propagate down to the ultimate replacee. The intermediately loads
// could theoretically already have been deleted, so we don't want to
// dereference the Value*'s.
- DenseMap<Value*, Value*>::iterator RLI = ReplacedLoads.find(NewVal);
+ auto RLI = ReplacedLoads.find(NewVal);
while (RLI != ReplacedLoads.end()) {
NewVal = RLI->second;
RLI = ReplacedLoads.find(NewVal);
diff --git a/llvm/tools/llvm-sim/llvm-sim.cpp b/llvm/tools/llvm-sim/llvm-sim.cpp
index bdd2779ffb1c4..6e86714ed4acd 100644
--- a/llvm/tools/llvm-sim/llvm-sim.cpp
+++ b/llvm/tools/llvm-sim/llvm-sim.cpp
@@ -45,7 +45,7 @@ std::optional<unsigned>
getPositionInModule(const Instruction *I,
const DenseMap<Instruction *, unsigned> &LLVMInstNum) {
assert(I && "Instruction is nullptr!");
- DenseMap<Instruction *, unsigned>::const_iterator It = LLVMInstNum.find(I);
+ auto It = LLVMInstNum.find(I);
if (It == LLVMInstNum.end())
return std::nullopt;
return It->second;
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