[llvm] [AArch64] New pass for code layout optimizations. (PR #184434)
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Sun May 10 12:52:06 PDT 2026
================
@@ -0,0 +1,262 @@
+//===-- AArch64CodeLayoutOpt.cpp - Code Layout Optimizations --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This pass runs after instruction scheduling and employs code layout
+// optimizations for certain patterns.
+//
+// Option -aarch64-code-layout-opt-enable selects instruction pairs to optimize:
+// cmp-csel: Enable CMP/CMN-CSEL code layout optimization
+// fcmp-fcsel: Enable FCMP-FCSEL code layout optimization
+//
+// The initial implementation induces function alignment when a supported
+// pattern is detected, and possibly instruction-alignment when a pair would
+// straddle cache-lines.
----------------
fhahn wrote:
I think this needs updating, AFAICT the code here now always aligns before the first instruction of the pair?
https://github.com/llvm/llvm-project/pull/184434
More information about the llvm-commits
mailing list