[llvm] [AArch64] New pass for code layout optimizations. (PR #184434)

[Florian Hahn via llvm-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; NOTE: Test cases for FCMP-FCSEL and CMP/CMN-CSEL code layout optimization
+; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-apple-darwin -mcpu=apple-m4 -aarch64-code-layout-opt-enable=fcmp-fcsel,cmp-csel | FileCheck %s
+; Default for -mcpu=apple-m4 enables both fcmp-fcsel and cmp-csel; expect identical output.
+; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-apple-darwin -mcpu=apple-m4 | FileCheck %s
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fhahn wrote:

Would be good to also cover the case where only either `fcmp-fcsel` or `cmp-csel` are enabled

https://github.com/llvm/llvm-project/pull/184434