[llvm] 7c0ae9c - [SLP][NFC]Add a test with scalable vector type in struct-returning intrinsic, NFC

[via llvm-commits]

Author: Alexey Bataev
Date: 2026-05-09T16:06:41-04:00
New Revision: 7c0ae9c245315bdc078950d69585da8a761b5532

URL: https://github.com/llvm/llvm-project/commit/7c0ae9c245315bdc078950d69585da8a761b5532
DIFF: https://github.com/llvm/llvm-project/commit/7c0ae9c245315bdc078950d69585da8a761b5532.diff

LOG: [SLP][NFC]Add a test with scalable vector type in struct-returning intrinsic, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/196747

Added: 
    llvm/test/Transforms/SLPVectorizer/RISCV/scalable-type-as-input.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/RISCV/scalable-type-as-input.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/scalable-type-as-input.ll
new file mode 100644
index 0000000000000..a3f777709be7d
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/scalable-type-as-input.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr=+v < %s | FileCheck %s
+
+define void @test(i32 %lhsWords) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: i32 [[LHSWORDS:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[WIDE_VP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr null, <vscale x 4 x i1> zeroinitializer, i32 0)
+; CHECK-NEXT:    [[STRIDED_VEC:%.*]] = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @llvm.vector.deinterleave2.nxv4i32(<vscale x 4 x i32> [[WIDE_VP_LOAD]])
+; CHECK-NEXT:    [[TMP0:%.*]] = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } [[STRIDED_VEC]], 0
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <vscale x 2 x i32> [[TMP0]] to <vscale x 2 x i64>
+; CHECK-NEXT:    [[WIDE_TRIP_COUNT404:%.*]] = zext i32 [[LHSWORDS]] to i64
+; CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[WIDE_TRIP_COUNT404]], i32 1, i1 false)
+; CHECK-NEXT:    call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> [[TMP1]], ptr null, <vscale x 2 x i1> zeroinitializer, i32 [[TMP2]])
+; CHECK-NEXT:    ret void
+;
+entry:
+  %wide.vp.load = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr null, <vscale x 4 x i1> zeroinitializer, i32 0)
+  %strided.vec = call { <vscale x 2 x i32>, <vscale x 2 x i32> } @llvm.vector.deinterleave2.nxv4i32(<vscale x 4 x i32> %wide.vp.load)
+  %0 = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i32> } %strided.vec, 0
+  %1 = zext <vscale x 2 x i32> %0 to <vscale x 2 x i64>
+  %wide.trip.count404 = zext i32 %lhsWords to i64
+  %2 = call i32 @llvm.experimental.get.vector.length.i64(i64 %wide.trip.count404, i32 1, i1 false)
+  call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> %1, ptr null, <vscale x 2 x i1> zeroinitializer, i32 %2)
+  ret void
+}
+
+declare i32 @llvm.experimental.get.vector.length.i64(i64, i32 immarg, i1 immarg)
+declare void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64>, ptr captures(none), <vscale x 2 x i1>, i32)
+declare <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr captures(none), <vscale x 4 x i1>, i32)
+declare { <vscale x 2 x i32>, <vscale x 2 x i32> } @llvm.vector.deinterleave2.nxv4i32(<vscale x 4 x i32>)
+