[llvm] [RISCV][GlobalISel] Lower G_SMULFIX (PR #196636)

[Gábor Spaits via llvm-commits]

================
@@ -10656,6 +10658,35 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerVAArg(MachineInstr &MI) {
   return Legalized;
 }
 
+LegalizerHelper::LegalizeResult
+LegalizerHelper::lowerSmulfix(MachineInstr &MI) {
+  auto [Dst, LHS, RHS] = MI.getFirst3Regs();
+  LLT Ty = MRI.getType(Dst);
+  if (Ty != MRI.getType(LHS) || Ty != MRI.getType(RHS) || !Ty.isScalar())
+    return UnableToLegalize;
+
+  unsigned Scale = MI.getOperand(3).getImm();
+  if (Scale >= Ty.getSizeInBits())
+    return UnableToLegalize;
+
+  if (Scale == 0) {
+    MIRBuilder.buildMul(Dst, LHS, RHS);
+    MI.eraseFromParent();
+    return Legalized;
+  }
+
+  LLT WideTy = LLT::scalar(Ty.getSizeInBits() * 2);
----------------
spaits wrote:

Also I might be better off moving the main part of the PR, the new lowering implementation of G_SMULFIX to another PR, that is for AArch64, since I couldn't really end-to-end test the vector case here for RISC-V, because the RISC-V GISel doesn't handle vector arguments:
```
LLVM ERROR: unable to lower arguments: <4 x i32> (<4 x i32>, <4 x i32>) (in function: smulfix_4xi32)
```
(I will also address this vector args for RISC-V GIsel issue in the near future. Seems like fun task to do.)

https://github.com/llvm/llvm-project/pull/196636