[llvm] [AMDGPU] Also disable lit64() from VOP3 and inline constant (PR #196421)

[Stanislav Mekhanoshin via llvm-commits]

https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/196421

None

>From d279247663d03ac5009d0f49adaddabaadb033d1 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Thu, 7 May 2026 13:56:49 -0700
Subject: [PATCH] [AMDGPU] Also disable lit64() from VOP3 and inline constant

---
 llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 8 +++++---
 llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s           | 5 +++++
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index f22f5f3f9841f..3ae957906fd82 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1052,7 +1052,9 @@ class AMDGPUOperand : public MCParsedAsmOperand {
     return getModifiers().hasIntModifiers();
   }
 
-  bool isForcedLit64() const { return getModifiers().isForcedLit64(); }
+  bool isForcedLit64() const {
+    return isImmLiteral() && getModifiers().isForcedLit64();
+  }
 
   uint64_t applyInputFPModifiers(uint64_t Val, unsigned Size) const;
 
@@ -5126,10 +5128,11 @@ bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
       Imm = getLitValue(MO.getExpr());
 
     bool IsAnotherLiteral = false;
+    bool IsForcedLit64 = findMCOperand(Operands, OpIdx).isForcedLit64();
     if (!Imm.has_value()) {
       // Literal value not known, so we conservately assume it's different.
       IsAnotherLiteral = true;
-    } else if (!isInlineConstant(Inst, OpIdx)) {
+    } else if (IsForcedLit64 || !isInlineConstant(Inst, OpIdx)) {
       uint64_t Value = *Imm;
       bool IsForcedFP64 =
           Desc.operands()[OpIdx].OperandType == AMDGPU::OPERAND_KIMM64 ||
@@ -5138,7 +5141,6 @@ bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst,
       bool IsFP64 = (IsForcedFP64 || AMDGPU::isSISrcFPOperand(Desc, OpIdx)) &&
                     AMDGPU::getOperandSize(Desc.operands()[OpIdx]) == 8;
       bool IsValid32Op = AMDGPU::isValid32BitLiteral(Value, IsFP64);
-      bool IsForcedLit64 = findMCOperand(Operands, OpIdx).isForcedLit64();
 
       if (((!IsValid32Op && !isInt<32>(Value) && !isUInt<32>(Value) &&
             !IsForcedFP64) ||
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
index fe39c861e5d39..27a17a747dea3 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
@@ -332,3 +332,8 @@ v_add_f64_e64 v[4:5], lit64(101.0), v[8:9]
 // GFX125X-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // GFX125X-ERR-NEXT:{{^}}v_add_f64_e64 v[4:5], lit64(101.0), v[8:9]
 // GFX125X-ERR-NEXT:{{^}}                            ^
+
+v_add_f64_e64 v[4:5], lit64(1.0), v[8:9]
+// GFX125X-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// GFX125X-ERR-NEXT:{{^}}v_add_f64_e64 v[4:5], lit64(1.0), v[8:9]
+// GFX125X-ERR-NEXT:{{^}}                            ^